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[AMDGPU] Do not count implicit VGPRs in SIInsertWaitcnts #109049

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Merged
merged 10 commits into from
Sep 25, 2024
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Update test checks
There seems to be an unrelated bug somewhere that produces different
results in debug and release builds. Updating checks to that from
debug build.
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rampitec committed Sep 24, 2024
commit 8b07b357fa06d7c10e4f304792a39b47f91a2f6c
Original file line number Diff line number Diff line change
Expand Up @@ -171,11 +171,9 @@ body: |
; GCN-LABEL: name: test_unmerge_values_s_s64_s_s64_s64_s_s192
; GCN: liveins: $sgpr0_sgpr1_sgpr2_sgpr3
; GCN-NEXT: {{ $}}
; GCN-NEXT: [[DEF:%[0-9]+]]:sgpr_192 = IMPLICIT_DEF
; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY [[DEF]].sub0_sub1
; GCN-NEXT: [[COPY1:%[0-9]+]]:sreg_64 = COPY [[DEF]].sub2_sub3
; GCN-NEXT: [[COPY2:%[0-9]+]]:sreg_64 = COPY [[DEF]].sub4_sub5
; GCN-NEXT: S_ENDPGM 0, implicit [[COPY]], implicit [[COPY1]], implicit [[COPY2]]
; GCN-NEXT: [[DEF:%[0-9]+]]:sgpr(s192) = G_IMPLICIT_DEF
; GCN-NEXT: [[UV:%[0-9]+]]:sgpr(s64), [[UV1:%[0-9]+]]:sgpr(s64), [[UV2:%[0-9]+]]:sgpr(s64) = G_UNMERGE_VALUES [[DEF]](s192)
; GCN-NEXT: S_ENDPGM 0, implicit [[UV]](s64), implicit [[UV1]](s64), implicit [[UV2]](s64)
%0:sgpr(s192) = G_IMPLICIT_DEF
%1:sgpr(s64), %2:sgpr(s64), %3:sgpr(s64) = G_UNMERGE_VALUES %0
S_ENDPGM 0, implicit %1, implicit %2, implicit %3
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