[CodeGen] x86_64 unable to select X86ISD::VSHLV/X86ISD::VSRLV on v32i1

[DataCorrupted]

Reproduction

https://godbolt.org/z/d4YWMP6cT

Same problem with emeraldrapids, sapphirerapids, or znver4.

@phoebewang Is this a bug or misuse? If it is a bug, I can help fix it.

[llvmbot]

@llvm/issue-subscribers-backend-x86

Author: Peter Rong (DataCorrupted)

# Reproduction

https://godbolt.org/z/d4YWMP6cT

Same problem with emeraldrapids, sapphirerapids, or znver4.

@phoebewang Is this a bug or misuse? If it is a bug, I can help fix it.

[phoebewang]

@DataCorrupted shl on i1 type is allowed, but the result is UB if the second operator is not full of zeros. Nevertheless, a crash is always a bug. I think we may simply optimize a

%c = shl <32 x i1> %a, %b

to

%c = %a

Similarly to lshr/ashr https://godbolt.org/z/KcTo3h8cq

[RKSimon]

Alive2: https://alive2.llvm.org/ce/z/SdESbg

[RKSimon]

Reduced:

define i32 @PR85681(i32 %a0) {
  %v0 = bitcast i32 %a0 to <32 x i1>
  %s = shl <32 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, %v0
  %r = bitcast <32 x i1> %s to i32
  ret i32 %r
}