[AArch64] Combine cmp + cset into eor

[vfdff]

• test: https://gcc.godbolt.org/z/19aG7a1ja

static A staticA;
A* Test::aPtr = &staticA;

int main() {
    if (!staticA.isDisabled())
      return 1; 
  return 0;
}

• clang:

main: // @main
  adrp x8, _ZL7staticA
  ldrb w8, [x8, :lo12:_ZL7staticA]
  cmp w8, #0
  cset w0, eq
  ret

• gcc:

main:
  adrp x0, .LANCHOR0
  ldrb w0, [x0, #:lo12:.LANCHOR0]
  eor w0, w0, 1
  ret

       .bss
        .align  3
        .set    .LANCHOR0,. + 0
        .type   _ZL7staticA, %object
        .size   _ZL7staticA, 1   ;  ldrb load 1 byte
_ZL7staticA:
        .zero   1

Note:
a) EOR rd, rn, op2 rd = rn ⊕ op2
b) CSET rd, cc if(cc) rd = 1; else rd = 0

[vfdff]

• It seems a regression for llvm15 , see detail: https://gcc.godbolt.org/z/T9aPWrbz9
  • related commit f400daa for #59897

[llvmbot]

@llvm/issue-subscribers-backend-aarch64

* test: https://gcc.godbolt.org/z/19aG7a1ja ``` static A staticA; A* Test::aPtr = &staticA;

int main() {
if (!staticA.isDisabled())
return 1;
return 0;
}

* clang:

main: // @main
adrp x8, _ZL7staticA
ldrb w8, [x8, :lo12:_ZL7staticA]
cmp w8, #0
cset w0, eq
ret

* gcc:

main:
adrp x0, .LANCHOR0
ldrb w0, [x0, #:lo12:.LANCHOR0]
eor w0, w0, 1
ret

   .bss
    .align  3
    .set    .LANCHOR0,. + 0
    .type   _ZL7staticA, %object
    .size   _ZL7staticA, 1   ;  ldrb load 1 byte

_ZL7staticA:
.zero 1

Note: 
a) EOR rd, rn, op2 rd = **rn ⊕ op2**
b) CSET rd, cc if(cc) rd = 1; else rd = 0


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