Lacking `f16c` and `avx512fp16` CPU feature strings for half-precision SIMDs

[ashvardanian]

GCC conveniently provides the __builtin_cpu_supports("f16c") and __builtin_cpu_supports("avx512fp16") used here, to detect the availability of half-precision float16 SIMD-instructions in x86 CPUs of the AVX2 and AVX-512 generations. Assuming this functionality is becoming more important in rising AI applications, achieving parity with recent GCC versions would be great.

For now, I've switched to inline Assembly to support a broader range of compilers. I'm ready to help patch Clang if more people face the issue.

[llvmbot]

@llvm/issue-subscribers-backend-x86

[phoebewang]

cc @FreddyLeaf

[ashvardanian]

If help is needed, I can contribute 🤗

[ecatmur]

Relevant locations are

llvm-project/llvm/include/llvm/TargetParser/X86TargetParser.def

Line 174 in 966d564

X86_FEATURE_COMPAT(AVX512VP2INTERSECT, "avx512vp2intersect", 37)

(for clang) and

llvm-project/compiler-rt/lib/builtins/cpu_model/x86.c

Line 144 in 966d564

FEATURE_F16C = 49,

and

llvm-project/compiler-rt/lib/builtins/cpu_model/x86.c

Line 746 in 966d564

if ((ECX >> 29) & 1)

(for compiler-rt). Note that support for f16c (but not avx512fp16) was added to compiler-rt in #59961 to support microarchitecture level x86-64-v3, but not to clang.

The enumeration

llvm-project/compiler-rt/lib/builtins/cpu_model/x86.c

Line 103 in 966d564

enum ProcessorFeatures {

and the "priority" in

llvm-project/compiler-rt/lib/builtins/cpu_model/x86.c

Line 103 in 966d564

enum ProcessorFeatures {

should each match the gcc feature enumeration https://github.com/gcc-mirror/gcc/blob/9693459e030977d6e906ea7eb587ed09ee4fddbd/gcc/common/config/i386/i386-cpuinfo.h#L154 for binary compatibility with libgcc.

When adding support to clang, it would be preferable to add corresponding support to compiler-rt and to document that a recent version of libgcc is required if using that rtlib, since otherwise the feature flag bit(s) will not have been set in cpu_features2.

[dbabokin]

@ashvardanian builtins are handy (I'm all for it), but to be more specific inline assembly is needed to execute cpuid instruction, not to detect just these bits / features. Just for the reference how it's done in ISPC: https://github.com/ispc/ispc/blob/a988515bd684be58dcf2ac4318bb55318dc6cb76/check_isa.cpp#L105 Implementation is cross planform (Linux/Mac/Windows; clang/gcc/msvc).

[phoebewang]

@ashvardanian builtins are handy (I'm all for it), but to be more specific inline assembly is needed to execute cpuid instruction, not to detect just these bits / features. Just for the reference how it's done in ISPC: https://github.com/ispc/ispc/blob/a988515bd684be58dcf2ac4318bb55318dc6cb76/check_isa.cpp#L105 Implementation is cross planform (Linux/Mac/Windows; clang/gcc/msvc).

I think it's more readiable if using pre-defined macros in https://github.com/llvm/llvm-project/blob/main/clang/lib/Headers/cpuid.h, but I'm not sure if other compiler using the same macros.
BTW, I wrote some code to auto parse such information https://github.com/phoebewang/DetectCPUFeatures/blob/main/DetectFeatures.cpp