Inefficient scalable vector codegen after "[SCEV] Add SCEVType to represent `vscale`."

[UsmanNadeem]

See sample code: https://godbolt.org/z/dnPzGrTqj

The issue was bisected to patch [SCEV] Add SCEVType to represent ``vscale``. :
https://reviews.llvm.org/D144891 or 62d11b2

A quick look shows that the difference comes from LSR and disabling LSR gives good code again.

Before the patch we were getting

        ld1d    { z1.d }, p0/z, [x1, x8, lsl #3]
        add     x11, x1, x10
        ld1d    { z2.d }, p0/z, [x11, #1, mul vl]
        ld1d    { z3.d }, p0/z, [x11, #2, mul vl]
        ld1d    { z4.d }, p0/z, [x11, #3, mul vl]
        ld1d    { z5.d }, p0/z, [x11, #4, mul vl]
        ...

Now we are seeing address calculation inside the loop:

        ld1d    { z1.d }, p0/z, [x1, x8, lsl #3]
        add     x11, x1, x10
        ld1b    { z2.b }, p1/z, [x11, x9]
        add     x12, x11, x9
        ld1b    { z3.b }, p1/z, [x12, x9]
        add     x13, x12, x9
        ld1b    { z4.b }, p1/z, [x13, x9]
        add     x11, x13, x9
        ld1b    { z5.b }, p1/z, [x11, x9]
        ...

[llvmbot]

@llvm/issue-subscribers-backend-aarch64

[UsmanNadeem]

@nikic @paulwalker-arm

[nikic]

The post-LSR output contains vscale GEP constant expressions, which are supposed to be forbidden since recently, so something is going very wrong here.

[UsmanNadeem]

The post-LSR output contains vscale GEP constant expressions, which are supposed to be forbidden since recently, so something is going very wrong here.

That is the output for 16.0, The trunk has normal GEPs: %scevgep1 = getelementptr i8, ptr %b.vector_ptr0, i64 %increment

[nikic]

Oh right, I confused the outputs.

It looks like the only real difference here is that previously the "vscale * 4" increment was repeated once for each GEP (in the form of a constexpr) and now it appears only once, outside the loop, which prevents it from being folded into the addressing mode.

I believe CGP is responsible for sinking such instructions to exploit addressing modes. I'm not particularly familiar with that code though.

[paulwalker-arm]

Fixed by #70304