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AArch64 backend miscompiles testcase of pre-dec addressing mode with constant offset #60645

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@huihzhang

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@huihzhang

Use reduced test IR below:

define i8* @test(i8* %ptr, i64 %t0) {
  %t1 = add nuw nsw i64 %t0, 8
  %t2 = mul i64 %t1, -4
  %t3 = getelementptr i8, i8* %ptr, i64 %t2
  %t4 = bitcast i8* %t3 to i32*
  store i32 0, i32* %t4, align 4
  %t5 = shl i64 %t1, 2
  %t6 = sub nuw nsw i64 -8, %t5
  %t7 = getelementptr i8, i8* %ptr, i64 %t6
  %t8 = bitcast i8* %t7 to i32*
  store i32 0, i32* %t8, align 4
  ret i8* %ptr
}

Run with: llc -mtriple=aarch64 < t.ll

test:                                   // @test
        .cfi_startproc
// %bb.0:
        sub     x8, x0, x1, lsl #2
        str     wzr, [x8, #32]! // wrong
        stur    wzr, [x8, #-8]
        ret

The first str is not generated right. It's pre-dec addressing, offset should be -32.

str     wzr, [x8, #-32]! // Expect -32 as offset.

Also note that this bug was exposed by https://reviews.llvm.org/D120216
Prior to D120216, we were generating correct code without auto-decreasing base address x8.

// %bb.0:
        sub     x8, x0, x1, lsl #2
        stur    wzr, [x8, #-32]
        stur    wzr, [x8, #-40]
        ret

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