[X86] Use X86FixupInstTunings to select between (V)MOVSS/D and (V)BLENDPS/D

[RKSimon]

We currently always prefer (V)BLENDPS/D over (V)MOVSS/D on SSE41+ targets due to better throughput on SandyBridge, unless we're optimizing for size.

Some AMD targets however have better throughput with (V)MOVSS/D - so it'd be better if we could remove the preference code from DAG and ISEL patterns and let X86FixupInstTunings handle it.

This might make it easier to improve merging of some SSE scalar ops (see #140693)

[llvmbot]

@llvm/issue-subscribers-backend-x86

Author: Simon Pilgrim (RKSimon)

We currently always prefer (V)BLENDPS/D over (V)MOVSS/D on SSE41+ targets due to better throughput on SandyBridge, unless we're optimizing for size.

Some AMD targets however have better throughput with (V)MOVSS/D - so it'd be better if we could remove the preference code from DAG and ISEL patterns and let X86FixupInstTunings handle it.

This might make it easier to improve merging of some SSE scalar ops (see #140693)

[houngkoungting]

HI @RKSimon , I'm interested in working on this issue and would like to give it a try. However, I'm still learning and not completely confident in my ability to solve it yet. If you're okay with that, I’d be grateful for any feedback or pointers along the way.

[RKSimon]

I'm triaging it now - its not going to be easy to clean up a lot of the isel patterns.

But what could be done as an easier first step would be to add handling to X86FixupInstTunings to check if existing (V)BLENDPD/S instructions have the correct blend mask (imm == 1) to be replaced with MOVSD/S if performant (or the function is built for OptSize).

[RKSimon]

@houngkoungting I've done some initial work at https://github.com/RKSimon/llvm-project/tree/x86-sched-movs-blend - it does the basics, but doesn't handle free domain crossing for (V)PBLENDW/D cases, or optsize cases where we should be more aggressively converting to (V)MOVSS/D.

Would you be interested in taking this as a starting point? The DAG/ISEL refactor could then be handled separately as followup work.

[houngkoungting]

Hi @RKSimon ,
Thanks so much for the pointer and for the initial work you've done in the x86-sched-movs-blend branch – I really appreciate it!
I'd love to take this as a starting point and explore how to extend it, especially for handling OptSize cases and maybe investigating the domain-crossing situations for (V)PBLENDW/D.

[RKSimon]

Perfect - OptSize should be easy as it just needs an additional "force" bool arg adding to ProcessBLENDrri when MF.getFunction().hasOptSize() - I'm not sure if we have test coverage for that or not (isel will already do a lot of optsize conversion).