[AArch64] We can materialize some immediates using add or sub

[AZero13]

add and sub have different immediate operand rules than mov.

We can use this to materialize certain operands in a single instruction.

define i64 @mov_basic_6() nounwind {
; CHECK-LABEL: mov_basic_6:
; CHECK: // %bb.0:
; CHECK-NEXT: mov x0, #-20481 // =0xffffffffffffafff
; CHECK-NEXT: movk x0, #65468, lsl #16
; CHECK-NEXT: ret
ret i64 -4411393
}

We can encode this in one:

sub X0, xzr, #imm12, LSL #12

Because 0xFFFFFFFF`FFXXXFFF

If it is 32 bits we can use the w register to our advantage
0x00000000`FFXXXFFF

And if it is something like 0x00000000`00XXX000

We can use

add w0, wzr, X, LSL 12

[llvmbot]

@llvm/issue-subscribers-backend-aarch64

Author: AZero13 (AZero13)

add and sub have different immediate operand rules than mov.

We can use this to materialize certain operands in a single instruction.

define i64 @mov_basic_6() nounwind {
; CHECK-LABEL: mov_basic_6:
; CHECK: // %bb.0:
; CHECK-NEXT: mov x0, #-20481 // =0xffffffffffffafff
; CHECK-NEXT: movk x0, #65468, lsl #16
; CHECK-NEXT: ret
ret i64 -4411393
}

We can encode this in one:

sub X0, xzr, #imm12, LSL #12

Because 0xFFFFFFFF`FFXXXFFF

If it is 32 bits we can use the w register to our advantage
0x00000000`FFXXXFFF

And if it is something like 0x00000000`00XXX000

We can use

add w0, wzr, X, LSL 12