How to support plenty of RISC-V Custom Instruction Extensions？

[TJU-PanYizhe]

RISC-V allows developers to introduce new custom instructions. Compiler(LLVM) needs modification to support diverse custom instructions.

Is it necessory to support every custom instruction proposed by vendors or in papers?

Maintaining a fork of LLVM for every custom instruction extension causes laborious manual effort. Moreover, merging conflict may happen when merging the newest code with the fork.

7 new custom instruction extensions are proposed at most per month in papers from arXiv.

[llvmbot]

@llvm/issue-subscribers-backend-risc-v

Author: Tony Pan (TJU-PanYizhe)

RISC-V allows developers to introduce new custom instructions. Compiler(LLVM) needs modification to support diverse custom instructions.

Is it necessory to support every custom instruction proposed by vendors or in papers?

Maintaining a fork of LLVM for every custom instruction extension causes laborious manual effort. Moreover, merging conflict may happen when merging the newest code with the fork.

7 new custom instruction extensions are proposed at most per month in papers from arXiv.

[wangpc-pp]

I think we only accept RVI extensions and vendor extensions that the owner (the company/the organization/...) has resources to maintain them. That usually means these extensions have some commercial uses, so paper works won't be implemented in LLVM.

[topperc]

Additional documentation on the policy here https://llvm.org/docs/RISCVUsage.html#vendor-extensions