AArch64 backend folds fcmp nnan nsz + select to fminnm, causing confusion between +0.0 and -0.0

[regehr]

we're lowing this:

define float @f(float %0, float %1) {
  %3 = fcmp nnan nsz ole float %0, %1
  %4 = select i1 %3, float %0, float %1
  ret float %4
}

to:

_f: 
	fminnm	s0, s0, s1
	ret

but this appears to be incorrect for f(0.0, -0.0). in the LLVM code, %3 = true, so we return 0.0. but the ARM version returns -0.0 for the same inputs.

cc @nunoplopes @arsenm @dtcxzyw

[llvmbot]

@llvm/issue-subscribers-backend-aarch64

Author: John Regehr (regehr)

we're lowing this: ```llvm define float @f(float %0, float %1) { %3 = fcmp nnan nsz ole float %0, %1 %4 = select i1 %3, float %0, float %1 ret float %4 } ``` to: ``` _f: fminnm s0, s0, s1 ret ```

but this appears to be incorrect for f(0.0, -0.0). in the LLVM code, %3 = true, so we return 0.0. but the ARM version returns -0.0 for the same inputs.

cc @nunoplopes @arsenm @dtcxzyw

[arsenm]

The logic appears to only account for literal zeros:

llvm-project/llvm/lib/Analysis/ValueTracking.cpp

Line 8895 in 2a5ee25

// IEEE-754 ignores the sign of 0.0 in comparisons. So if the select has one

[dtcxzyw]

matchDecomposedSelectPattern takes FMF from fcmp:

llvm-project/llvm/lib/Analysis/ValueTracking.cpp

Lines 9221 to 9223 in c024969

	FastMathFlags FMF;
	if (isa<FPMathOperator>(CmpI))
	FMF = CmpI->getFastMathFlags();

But we need to check nsz flag on select: https://alive2.llvm.org/ce/z/Jo3g3P