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Description
While debugging a reggression in julia we found that some code that used to vectorize no longer does. Digging deeper it looks like it's a reggression in instcombine from LLVM 18 to LLVM 19 (still there on trunk)
define swiftcc float @julia_perf_sum_1108(ptr nonnull swiftself %0, ptr noundef nonnull align 8 dereferenceable(16) %1) local_unnamed_addr #0 {
%8 = load i64, ptr %1, align 8, !tbaa !9, !alias.scope !12, !noalias !15
%9 = icmp slt i64 %8, 1
br i1 %9, label %26, label %10
10: ; preds = %2
%11 = getelementptr inbounds i8, ptr %1, i64 8
%12 = load ptr, ptr %11, align 8, !tbaa !20, !alias.scope !12, !noalias !15, !nonnull !8
%13 = getelementptr inbounds [1 x i32], ptr %12, i64 %8
br label %14
14: ; preds = %14, %10
%15 = phi i64 [ 0, %10 ], [ %17, %14 ]
%16 = phi float [ 0.000000e+00, %10 ], [ %24, %14 ]
%17 = add nuw nsw i64 %15, 1
%18 = getelementptr inbounds [1 x i32], ptr %12, i64 %15
%19 = getelementptr inbounds i8, ptr %13, i64 %15
%20 = load i8, ptr %19, align 1, !tbaa !22, !range !24, !alias.scope !12, !noalias !15
%21 = load float, ptr %18, align 4, !tbaa !25, !alias.scope !28, !noalias !29
%22 = icmp eq i8 %20, 0
%23 = fadd float %16, %21
%24 = select i1 %22, float %16, float %23
; %23 = select i1 %22, float -0.000000e+00, float %21
; %24 = fadd float %23, %16
%25 = icmp eq i64 %17, %8
br i1 %25, label %26, label %14, !llvm.loop !30
26: ; preds = %14, %2
%27 = phi float [ 0.000000e+00, %2 ], [ %24, %14 ]
ret float %27
}
The select highlighted used to be able to be folded into %24 = select i1 %23, float -0.000000e+00, float %22
which allowed a sequence of loop-simplify + LCSSA + vectorize to vectorize the loop. The sequence still works, but the instcombine change makes it not vectorize
https://godbolt.org/z/GE369hEcr (Just the instcombine)
https://godbolt.org/z/5YWo5WPY8 (Whole sequence)