Skip to content

[RISC-V] Assertion `TrueV0Def && TrueV0Def->isCopy() && MIV0Def && MIV0Def->isCopy()' failed. #107950

Closed
@patrick-rivos

Description

@patrick-rivos

LLVM IR:

target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128"
target triple = "riscv64-unknown-linux-gnu"

define void @m(<vscale x 4 x i1> %0) #0 {
entry:
  %broadcast.splatinsert184 = insertelement <vscale x 4 x ptr> zeroinitializer, ptr null, i64 0
  %broadcast.splat185 = shufflevector <vscale x 4 x ptr> %broadcast.splatinsert184, <vscale x 4 x ptr> zeroinitializer, <vscale x 4 x i32> zeroinitializer
  %wide.masked.gather186 = tail call <vscale x 4 x i32> @llvm.masked.gather.nxv4i32.nxv4p0(<vscale x 4 x ptr> %broadcast.splat185, i32 4, <vscale x 4 x i1> %0, <vscale x 4 x i32> zeroinitializer)
  %predphi187 = select <vscale x 4 x i1> %0, <vscale x 4 x i32> %wide.masked.gather186, <vscale x 4 x i32> zeroinitializer
  %1 = extractelement <vscale x 4 x i32> %predphi187, i32 0
  store i32 %1, ptr null, align 4
  ret void
}

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(read)
declare <vscale x 4 x i32> @llvm.masked.gather.nxv4i32.nxv4p0(<vscale x 4 x ptr>, i32 immarg, <vscale x 4 x i1>, <vscale x 4 x i32>) #1

attributes #0 = { "target-features"="+64bit,+d,+f,+relax,+v,+xsifivecdiscarddlone,+zicsr,+zve32f,+zve32x,+zve64d,+zve64f,+zve64x,+zvl128b,+zvl32b,+zvl64b,-a,-b,-c,-e,-experimental-smctr,-experimental-smmpm,-experimental-smnpm,-experimental-ssctr,-experimental-ssnpm,-experimental-sspm,-experimental-supm,-experimental-zacas,-experimental-zalasr,-experimental-zicfilp,-experimental-zicfiss,-experimental-zvbc32e,-experimental-zvkgs,-h,-m,-shcounterenw,-shgatpa,-shtvala,-shvsatpa,-shvstvala,-shvstvecd,-smaia,-smcdeleg,-smcsrind,-smepmp,-smstateen,-ssaia,-ssccfg,-ssccptr,-sscofpmf,-sscounterenw,-sscsrind,-ssqosid,-ssstateen,-ssstrict,-sstc,-sstvala,-sstvecd,-ssu64xl,-svade,-svadu,-svbare,-svinval,-svnapot,-svpbmt,-xcvalu,-xcvbi,-xcvbitmanip,-xcvelw,-xcvmac,-xcvmem,-xcvsimd,-xsfcease,-xsfvcp,-xsfvfnrclipxfqf,-xsfvfwmaccqqq,-xsfvqmaccdod,-xsfvqmaccqoq,-xsifivecflushdlone,-xtheadba,-xtheadbb,-xtheadbs,-xtheadcmo,-xtheadcondmov,-xtheadfmemidx,-xtheadmac,-xtheadmemidx,-xtheadmempair,-xtheadsync,-xtheadvdot,-xventanacondops,-xwchc,-za128rs,-za64rs,-zaamo,-zabha,-zalrsc,-zama16b,-zawrs,-zba,-zbb,-zbc,-zbkb,-zbkc,-zbkx,-zbs,-zca,-zcb,-zcd,-zce,-zcf,-zcmop,-zcmp,-zcmt,-zdinx,-zfa,-zfbfmin,-zfh,-zfhmin,-zfinx,-zhinx,-zhinxmin,-zic64b,-zicbom,-zicbop,-zicboz,-ziccamoa,-ziccif,-zicclsm,-ziccrse,-zicntr,-zicond,-zifencei,-zihintntl,-zihintpause,-zihpm,-zimop,-zk,-zkn,-zknd,-zkne,-zknh,-zkr,-zks,-zksed,-zksh,-zkt,-zmmul,-ztso,-zvbb,-zvbc,-zvfbfmin,-zvfbfwma,-zvfh,-zvfhmin,-zvkb,-zvkg,-zvkn,-zvknc,-zvkned,-zvkng,-zvknha,-zvknhb,-zvks,-zvksc,-zvksed,-zvksg,-zvksh,-zvkt,-zvl1024b,-zvl16384b,-zvl2048b,-zvl256b,-zvl32768b,-zvl4096b,-zvl512b,-zvl65536b,-zvl8192b" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(read) }

Backtrace:

> /scratch/tc-testing/tc-compiler-fuzz-trunk/build-gcv/build-llvm-linux/bin/llc reduced.ll
llc: /scratch/tc-testing/tc-compiler-fuzz-trunk/llvm/llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp:410: bool {anonymous}::RISCVVectorPeephole::convertSameMaskVMergeToVMv(llvm::MachineInstr&): Assertion `TrueV0Def && TrueV0Def->isCopy() && MIV0Def && MIV0Def->isCopy()' failed.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0.      Program arguments: /scratch/tc-testing/tc-compiler-fuzz-trunk/build-gcv/build-llvm-linux/bin/llc reduced.ll
1.      Running pass 'Function Pass Manager' on module 'reduced.ll'.
2.      Running pass 'RISC-V Vector Peephole Optimization' on function '@m'
 #0 0x00005f64a118b090 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) (/scratch/tc-testing/tc-compiler-fuzz-trunk/build-gcv/build-llvm-linux/bin/llc+0x1e94090)
 #1 0x00005f64a118849f llvm::sys::RunSignalHandlers() (/scratch/tc-testing/tc-compiler-fuzz-trunk/build-gcv/build-llvm-linux/bin/llc+0x1e9149f)
 #2 0x00005f64a11885f5 SignalHandler(int) Signals.cpp:0:0
 #3 0x000073cfabc42520 (/lib/x86_64-linux-gnu/libc.so.6+0x42520)
 #4 0x000073cfabc969fc __pthread_kill_implementation ./nptl/pthread_kill.c:44:76
 #5 0x000073cfabc969fc __pthread_kill_internal ./nptl/pthread_kill.c:78:10
 #6 0x000073cfabc969fc pthread_kill ./nptl/pthread_kill.c:89:10
 #7 0x000073cfabc42476 gsignal ./signal/../sysdeps/posix/raise.c:27:6
 #8 0x000073cfabc287f3 abort ./stdlib/abort.c:81:7
 #9 0x000073cfabc2871b _nl_load_domain ./intl/loadmsgcat.c:1177:9
#10 0x000073cfabc39e96 (/lib/x86_64-linux-gnu/libc.so.6+0x39e96)
#11 0x00005f649fa0162e (anonymous namespace)::RISCVVectorPeephole::convertSameMaskVMergeToVMv(llvm::MachineInstr&) RISCVVectorPeephole.cpp:0:0
#12 0x00005f649fa022b3 (anonymous namespace)::RISCVVectorPeephole::runOnMachineFunction(llvm::MachineFunction&) RISCVVectorPeephole.cpp:0:0
#13 0x00005f64a0084297 llvm::MachineFunctionPass::runOnFunction(llvm::Function&) (.part.0) MachineFunctionPass.cpp:0:0
#14 0x00005f64a06aba77 llvm::FPPassManager::runOnFunction(llvm::Function&) (/scratch/tc-testing/tc-compiler-fuzz-trunk/build-gcv/build-llvm-linux/bin/llc+0x13b4a77)
#15 0x00005f64a06abec9 llvm::FPPassManager::runOnModule(llvm::Module&) (/scratch/tc-testing/tc-compiler-fuzz-trunk/build-gcv/build-llvm-linux/bin/llc+0x13b4ec9)
#16 0x00005f64a06ac881 llvm::legacy::PassManagerImpl::run(llvm::Module&) (/scratch/tc-testing/tc-compiler-fuzz-trunk/build-gcv/build-llvm-linux/bin/llc+0x13b5881)
#17 0x00005f649f9829c6 compileModule(char**, llvm::LLVMContext&) llc.cpp:0:0
#18 0x00005f649f8c7bd6 main (/scratch/tc-testing/tc-compiler-fuzz-trunk/build-gcv/build-llvm-linux/bin/llc+0x5d0bd6)
#19 0x000073cfabc29d90 __libc_start_call_main ./csu/../sysdeps/nptl/libc_start_call_main.h:58:16
#20 0x000073cfabc29e40 call_init ./csu/../csu/libc-start.c:128:20
#21 0x000073cfabc29e40 __libc_start_main ./csu/../csu/libc-start.c:379:5
#22 0x00005f649f9797e5 _start (/scratch/tc-testing/tc-compiler-fuzz-trunk/build-gcv/build-llvm-linux/bin/llc+0x6827e5)
zsh: IOT instruction (core dumped)  /scratch/tc-testing/tc-compiler-fuzz-trunk/build-gcv/build-llvm-linux/bin/llc

Godbolt: https://godbolt.org/z/TGzsjT7P3

Tested using d9a9960

-opt-bisect-limit points to RISC-V Vector Peephole Optimization

Found via fuzzer.

Metadata

Metadata

Assignees

Labels

backend:RISC-VcrashPrefer [crash-on-valid] or [crash-on-invalid]

Type

No type

Projects

No projects

Milestone

No milestone

Relationships

None yet

Development

No branches or pull requests

Issue actions