Closed
Description
❯ cat reduced.ll
target datalayout = "e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64"
target triple = "mipsel-unknown-linux-unknown"
define void @_start() {
Entry:
%0 = load <1 x i80>, ptr null, align 16
call fastcc void null(<1 x i80> %0)
ret void
}
❯ llc -O0 reduced.ll
LLVM ERROR: Do not know how to expand this operator's operand!
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0. Program arguments: llc -O0 reduced.ll
1. Running pass 'Function Pass Manager' on module 'reduced.ll'.
2. Running pass 'MIPS DAG->DAG Pattern Instruction Selection' on function '@_start'
#0 0x00007ff7d6e62b42 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) (/opt/llvm/bin/../lib/libLLVM.so.18.1+0xa62b42)
#1 0x00007ff7d6e5ff9b SignalHandler(int) Signals.cpp:0:0
#2 0x00007ff7d5c42990 (/lib/x86_64-linux-gnu/libc.so.6+0x42990)
#3 0x00007ff7d5c99a1b __pthread_kill_implementation ./nptl/pthread_kill.c:44:76
#4 0x00007ff7d5c99a1b __pthread_kill_internal ./nptl/pthread_kill.c:78:10
#5 0x00007ff7d5c99a1b pthread_kill ./nptl/pthread_kill.c:89:10
#6 0x00007ff7d5c428e6 gsignal ./signal/../sysdeps/posix/raise.c:27:6
#7 0x00007ff7d5c268b7 abort ./stdlib/abort.c:81:7
#8 0x00007ff7d6b84ced llvm::json::operator==(llvm::json::Value const&, llvm::json::Value const&) (.cold) JSON.cpp:0:0
#9 0x00007ff7d6d671ce (/opt/llvm/bin/../lib/libLLVM.so.18.1+0x9671ce)
#10 0x00007ff7d786db21 llvm::DAGTypeLegalizer::ExpandIntegerOperand(llvm::SDNode*, unsigned int) (/opt/llvm/bin/../lib/libLLVM.so.18.1+0x146db21)
#11 0x00007ff7d78908e9 llvm::DAGTypeLegalizer::run() (/opt/llvm/bin/../lib/libLLVM.so.18.1+0x14908e9)
#12 0x00007ff7d7890fdd llvm::SelectionDAG::LegalizeTypes() (/opt/llvm/bin/../lib/libLLVM.so.18.1+0x1490fdd)
#13 0x00007ff7d79ec534 llvm::SelectionDAGISel::CodeGenAndEmitDAG() (/opt/llvm/bin/../lib/libLLVM.so.18.1+0x15ec534)
#14 0x00007ff7d79ef178 llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function const&) (/opt/llvm/bin/../lib/libLLVM.so.18.1+0x15ef178)
#15 0x00007ff7d79f179a llvm::SelectionDAGISel::runOnMachineFunction(llvm::MachineFunction&) (.part.0) SelectionDAGISel.cpp:0:0
#16 0x00007ff7da5fd81e llvm::MipsDAGToDAGISel::runOnMachineFunction(llvm::MachineFunction&) (/opt/llvm/bin/../lib/libLLVM.so.18.1+0x41fd81e)
#17 0x00007ff7d739ab08 llvm::MachineFunctionPass::runOnFunction(llvm::Function&) (.part.0) MachineFunctionPass.cpp:0:0
#18 0x00007ff7d701abd9 llvm::FPPassManager::runOnFunction(llvm::Function&) (/opt/llvm/bin/../lib/libLLVM.so.18.1+0xc1abd9)
#19 0x00007ff7d701af24 llvm::FPPassManager::runOnModule(llvm::Module&) (/opt/llvm/bin/../lib/libLLVM.so.18.1+0xc1af24)
#20 0x00007ff7d701b92e llvm::legacy::PassManagerImpl::run(llvm::Module&) (/opt/llvm/bin/../lib/libLLVM.so.18.1+0xc1b92e)
#21 0x00005ea99532abeb compileModule(char**, llvm::LLVMContext&) llc.cpp:0:0
#22 0x00005ea995320756 main (/opt/llvm/bin/llc+0x11756)
#23 0x00007ff7d5c28150 __libc_start_call_main ./csu/../sysdeps/nptl/libc_start_call_main.h:74:3
#24 0x00007ff7d5c28209 call_init ./csu/../csu/libc-start.c:128:20
#25 0x00007ff7d5c28209 __libc_start_main ./csu/../csu/libc-start.c:347:5
#26 0x00005ea995321415 _start (/opt/llvm/bin/llc+0x12415)
❯ llc --version
LLVM (http://llvm.org/):
LLVM version 18.1.8
Optimized build.
Default target: x86_64-unknown-linux-gnu
Host CPU: alderlake
Registered Targets:
aarch64 - AArch64 (little endian)
aarch64_32 - AArch64 (little endian ILP32)
aarch64_be - AArch64 (big endian)
amdgcn - AMD GCN GPUs
arc - ARC
arm - ARM
arm64 - ARM64 (little endian)
arm64_32 - ARM64 (little endian ILP32)
armeb - ARM (big endian)
avr - Atmel AVR Microcontroller
bpf - BPF (host endian)
bpfeb - BPF (big endian)
bpfel - BPF (little endian)
csky - C-SKY
dxil - DirectX Intermediate Language
hexagon - Hexagon
lanai - Lanai
loongarch32 - 32-bit LoongArch
loongarch64 - 64-bit LoongArch
m68k - Motorola 68000 family
mips - MIPS (32-bit big endian)
mips64 - MIPS (64-bit big endian)
mips64el - MIPS (64-bit little endian)
mipsel - MIPS (32-bit little endian)
msp430 - MSP430 [experimental]
nvptx - NVIDIA PTX 32-bit
nvptx64 - NVIDIA PTX 64-bit
ppc32 - PowerPC 32
ppc32le - PowerPC 32 LE
ppc64 - PowerPC 64
ppc64le - PowerPC 64 LE
r600 - AMD GPUs HD2XXX-HD6XXX
riscv32 - 32-bit RISC-V
riscv64 - 64-bit RISC-V
sparc - Sparc
sparcel - Sparc LE
sparcv9 - Sparc V9
spirv - SPIR-V Logical
spirv32 - SPIR-V 32-bit
spirv64 - SPIR-V 64-bit
systemz - SystemZ
thumb - Thumb
thumbeb - Thumb (big endian)
ve - VE
wasm32 - WebAssembly 32-bit
wasm64 - WebAssembly 64-bit
x86 - 32-bit X86: Pentium-Pro and above
x86-64 - 64-bit X86: EM64T and AMD64
xcore - XCore
xtensa - Xtensa 32