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SpencerAbson

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Commits on Jan 2, 2025

• [clang][AArch64] Remove references to vector size in SVE immediate range checking. NFC

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Commits on Dec 31, 2024

• [AArch64][NFC] Remove redundant comments in SMEInstrInfo

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Commits on Dec 20, 2024

• [AArch64] Avoid GPR trip when moving truncated i32 vector elements (#114541)

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Commits on Dec 19, 2024

• [Clang][AArch64] Remove const from base pointers in sve2p1 stores (#120551)

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• [Clang][AArch64] Add signed index/offset variants of sve2p1 qword stores (#120549)

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• [AArch64] Fixup destructive floating-point precision conversions (#118788)

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Commits on Dec 17, 2024

• [AArch64] Implement intrinsics for FP8 SME FMLAL/FMLALL (multi) (#119546)

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• [AArch64] Implement intrinsics for FMLAL/FMLALL (single) (#119568)

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Commits on Dec 16, 2024

• [AArch64] Implement intrinsics for SME FP8 FMLAL/FMLALL (Indexed) (#118549)

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Commits on Dec 11, 2024

• [AArch64] Implement intrinsics for FP8 FCVT/FCVTN/BFCVT (#118025)

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Commits on Dec 9, 2024

• [AArch64] Implement intrinsics for SME FP8 FMOPA (#118115)

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Commits on Dec 8, 2024

• [AArch64] Implement intrinsics for SME FP8 F1CVT/F2CVT and BF1CVT/BF2CVT (#118027)

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Commits on Dec 4, 2024

• [AArch64][Clang] Define __ARM_NEON_SVE_BRIDGE unconditionally (#118272)

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Commits on Dec 2, 2024

• [Clang][AArch64]Refactor typespec handling in SveEmitter.cpp (#117717)

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Commits on Nov 28, 2024

• [AArch64] Implement intrinsics for F1CVTL/F2CVTL and BF1CVTL/BF2CVTL (#116959)

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Commits on Nov 26, 2024

• [AArch64][SVE] Change the immediate argument in svextq (#115340)

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Commits on Nov 15, 2024

• [AArch64] Allow SVE_AES instructions in streaming mode with SSVE_AES (#115526)

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Commits on Nov 14, 2024

• [AArch64] Make +sve2-aes an alias of +sve2+sve-aes (#116026)

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Commits on Nov 8, 2024

• Revert "[AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (#114… (#115539)

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• [AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (#114293)

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Commits on Oct 31, 2024

• [AArch64] Add assembly/disassembly for zeroing SVE REV{B,H,W,D} and RBIT (#114110)

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• [AArch64][SVE] Use INS when moving elements from bottom 128b of SVE type (#114034)

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Commits on Oct 30, 2024

• [AArch64] Add assembly/disassembly for SVE COMPACT (b/h) and EXPAND (#114053)

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Commits on Oct 29, 2024

• [AArch64] Add assembly/disassembly for zeroing SVE FCVT{X} and BFCVT (#113916)

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Commits on Oct 28, 2024

• [AArch64] Add assembly/disassembly for PMLAL/PMULL instructions (#113564)

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• [AArch64] Add assembly/disassembly for zeroing SVE2 integer instructions (#113473)

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Commits on Oct 25, 2024

• [AArch64] Add assembly/disassembly for SVE zeroing int-float conversions (#113605)

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Commits on Oct 24, 2024

• [AArch64] Add assembly/disassembly for zeroing FRINT and FRECPX/FSQRT (#113543)

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• [AArch64] Add assembly/disassembly for FRINT{32,64}{X,Z} (merging) (#113562)

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• [AArch64] Add assembly/disassembly for multi-vector AES instructions (#113307)

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Commits on Oct 23, 2024

• [lldb] Cover all of SVE_TYPE in encoding switch

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• [LLVM][AArch64] Add assembly/disassembly for FTMOPA and BFTMOPA (#113230)

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Commits on Oct 21, 2024

• [NFC] Fix -WError for unused Encode/Decode ZK methods

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• [LLVM][AArch64] Add register classes for Armv9.6 assembly (#111717)

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Commits on Oct 17, 2024

• [AArch64][Clang][NEON] Remove undefined vcmla intrinsics (#112575)

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