Skip to content

Commit

Permalink
[AArch64][SVE] Fix selection failure during lowering of shuffle_vector
Browse files Browse the repository at this point in the history
The lowering code for shuffle_vector has a code path that looks through
extract_subvector, this code path did not properly account for the
potential presense of larger than Neon vector types and could produce
unselectable DAG nodes.

Differential Revision: https://reviews.llvm.org/D119252

(cherry picked from commit 98936ae)
  • Loading branch information
brads55 authored and tstellar committed Feb 22, 2022
1 parent 8b5b29c commit 03d9a40
Show file tree
Hide file tree
Showing 2 changed files with 24 additions and 2 deletions.
4 changes: 4 additions & 0 deletions llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -9733,6 +9733,10 @@ static SDValue constructDup(SDValue V, int Lane, SDLoc dl, EVT VT,
if (ExtIdxInBits % CastedEltBitWidth != 0)
return false;

// Can't handle cases where vector size is not 128-bit
if (!Extract.getOperand(0).getValueType().is128BitVector())
return false;

// Update the lane value by offsetting with the scaled extract index.
LaneC += ExtIdxInBits / CastedEltBitWidth;

Expand Down
22 changes: 20 additions & 2 deletions llvm/test/CodeGen/AArch64/sve-fixed-length-shuffles.ll
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
; RUN: llc -aarch64-sve-vector-bits-min=256 < %s | FileCheck %s
; RUN: llc < %s | FileCheck %s

target triple = "aarch64-unknown-linux-gnu"

Expand All @@ -14,4 +14,22 @@ define void @hang_when_merging_stores_after_legalisation(<8 x i32>* %a, <2 x i32
ret void
}

attributes #0 = { nounwind "target-features"="+sve" }
; Ensure we don't crash when trying to lower a shuffle via and extract
define void @crash_when_lowering_extract_shuffle(<32 x i32>* %dst, i1 %cond) #0 {
; CHECK-LABEL: crash_when_lowering_extract_shuffle:
; CHECK: ld1w { z3.s }, p0/z, [x0]
; CHECK: st1w { z3.s }, p0, [x0]
%broadcast.splat = shufflevector <32 x i1> zeroinitializer, <32 x i1> zeroinitializer, <32 x i32> zeroinitializer
br i1 %cond, label %exit, label %vector.body

vector.body:
%1 = load <32 x i32>, <32 x i32>* %dst, align 16
%predphi = select <32 x i1> %broadcast.splat, <32 x i32> zeroinitializer, <32 x i32> %1
store <32 x i32> %predphi, <32 x i32>* %dst, align 16
br label %exit

exit:
ret void
}

attributes #0 = { vscale_range(2,2) "target-features"="+sve" }

0 comments on commit 03d9a40

Please sign in to comment.