[CIR][HIP] Lower Device CIR to LLVM IR

[koparasy]

No description provided.

[koparasy]

@bcardosolopes this code interleaves alloca's with address space casts. Is this allowed? Or should I add the allocas at the function entry point?

[bcardosolopes]

80-cols

[koparasy]

Nice catch! Fixed

[bcardosolopes]

nit: pass -I ../Inputs in the invocation below and just use #include "cuda.h"

[koparasy]

Fixed

[bcardosolopes]

Similar comment from above

[koparasy]

Fixed

[bcardosolopes]

Please also add LLVM checks for lowering here, and add OGCG for tracking classic codegen alongside (see clang/test/CIR/CodeGen/CUDA/cuda-builtin-vars.cu as an example). Same for the other tests!

[koparasy]

Fixed

[bcardosolopes]

@bcardosolopes this code interleaves alloca's with address space casts. Is this allowed? Or should I add the allocas at the function entry point?

The allocas should already be at the function entry BB, are you seeing anything different? How does the final LLVM IR looks like? We should try to emit it to be the most similar as possible, but intermingling them within the function entry BB doesn't seem too problematic.

[koparasy]

@bcardosolopes this code interleaves alloca's with address space casts. Is this allowed? Or should I add the allocas at the function entry point?

The allocas should already be at the function entry BB, are you seeing anything different? How does the final LLVM IR looks like? We should try to emit it to be the most similar as possible, but intermingling them within the function entry BB doesn't seem too problematic.

Here is the device code generated for a device function through clangir:

define dso_local void @_Z9device_fnPidf(ptr %0, double %1, float %2) #0 {
  %4 = alloca ptr, i64 1, align 8, addrspace(5)
  %5 = addrspacecast ptr addrspace(5) %4 to ptr
  %6 = alloca double, i64 1, align 8, addrspace(5)
  %7 = addrspacecast ptr addrspace(5) %6 to ptr
  %8 = alloca float, i64 1, align 4, addrspace(5)
  %9 = addrspacecast ptr addrspace(5) %8 to ptr
  store ptr %0, ptr %5, align 8
  store double %1, ptr %7, align 8
  store float %2, ptr %9, align 4
  ret void
}

Here is OG:

define dso_local void @_Z9device_fnPidf(ptr noundef %a, double noundef %b, float noundef %c) #0 {
entry:
  %a.addr = alloca ptr, align 8, addrspace(5)
  %b.addr = alloca double, align 8, addrspace(5)
  %c.addr = alloca float, align 4, addrspace(5)
  %a.addr.ascast = addrspacecast ptr addrspace(5) %a.addr to ptr
  %b.addr.ascast = addrspacecast ptr addrspace(5) %b.addr to ptr
  %c.addr.ascast = addrspacecast ptr addrspace(5) %c.addr to ptr
  store ptr %a, ptr %a.addr.ascast, align 8
  store double %b, ptr %b.addr.ascast, align 8
  store float %c, ptr %c.addr.ascast, align 4
  ret void
}

Both codes as far as I can tell are equivalent and should be fine.