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Introduce io386 to heads and use it to finalize chipset at runtime
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On some newer platforms of intel (confirmed on nehalem, sandy/ivy
bridge), coreboot after commit [2ac149d294af795710eb4bb20f093e9920604abd](https://review.coreboot.org/cgit/coreboot.git/commit/?id=2ac149d294af795710eb4bb20f093e9920604abd)
registers an SMI to lockdown some registers on the chipset, as well
as access to the SPI flash, optionally. The SMI will always be triggered
by coreboot during S3 resume, but can be triggered by either coreboot
or the payload during normal boot path.

Enabling lockdown access to SPI flash will effectly write-protect it,
but there is no runtime option for coreboot to control it, so letting
coreboot to trigger such SMI will leave the owner of the machine lost
any possibility to program the SPI flash with its own OS, and becomes
a nightmare if the machine is uneasy to disassemble, so a scheme could
be implement, in which the SMI to lockdown chipset and SPI flash is left
for a payload to trigger, and temporarily disabling such triggering in
order to program the SPI flash needs authentication.

I have implemented a passcode-protected runtime-disableable lockdown
with grub, described [here](https://github.com/hardenedlinux/Debian-GNU-Linux-Profiles/blob/master/docs/hardened_boot/grub-for-coreboot.md#update-for-coreboot-after-commit-2ac149d294af795710eb4bb20f093e9920604abd). In order to implement a similar scheme for
Heads, I wrote [io386](https://github.com/hardenedlinux/io386).

With this commit, io386 will be called before entering boot routine
to trigger the SMI to finalize the chipset and write protect the SPI
flash at the same time. Entering recovery shell will leave the flash
writable.

(The authentication routine implemented in previous revisions has been
split as an independent commit.)
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persmule committed Mar 14, 2018
1 parent 21a3059 commit 576c7aa
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Showing 4 changed files with 47 additions and 0 deletions.
1 change: 1 addition & 0 deletions Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -328,6 +328,7 @@ bin_modules-$(CONFIG_LVM2) += lvm2
bin_modules-$(CONFIG_DROPBEAR) += dropbear
bin_modules-$(CONFIG_FLASHTOOLS) += flashtools
bin_modules-$(CONFIG_NEWT) += newt
bin_modules-$(CONFIG_IO386) += io386

$(foreach m, $(bin_modules-y), \
$(call map,initrd_bin_add,$(call bins,$m)) \
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11 changes: 11 additions & 0 deletions initrd/bin/generic-init
Original file line number Diff line number Diff line change
Expand Up @@ -40,24 +40,35 @@ while true; do
fi

if [ "$totp_confirm" = "u" ]; then
if [ "$CONFIG_IO386" = y ]; then
lock_chip
fi
exec /bin/usb-init
continue
fi

if [ "$totp_confirm" = "m" ]; then
# Try to select a kernel from the menu
if [ "$CONFIG_IO386" = y ]; then
lock_chip
fi
mount_boot
kexec-select-boot -m -b /boot -c "grub.cfg"
continue
fi

if [ "$totp_confirm" = "y" -o -n "$totp_confirm" ]; then
# Try to boot the default
if [ "$CONFIG_IO386" = y ]; then
lock_chip
fi
mount_boot
kexec-select-boot -b /boot -c "grub.cfg" \
|| recovery "Failed default boot"
fi



done

recovery "Something failed during boot"
7 changes: 7 additions & 0 deletions initrd/etc/functions
Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,13 @@ warn() {
echo >&2 "$*";
}

lock_chip() {
APM_CNT=0xb2
FIN_CODE=0xcb
echo "Finalizing chipset"
io386 -o b -b x $APM_CNT $FIN_CODE
}

recovery() {
echo >&2 "!!!!! $*"

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28 changes: 28 additions & 0 deletions modules/io386
Original file line number Diff line number Diff line change
@@ -0,0 +1,28 @@
modules-$(CONFIG_IO386) += io386

io386_depends := $(musl_dep)

io386_version := git
io386_repo := https://github.com/hardenedlinux/io386
io386_dir := io386-$(io386_version)

io386_target := \
$(MAKE_JOBS) \
$(CROSS_TOOLS) \
SHARED=yes \
PREFIX="/" \
&& \
$(MAKE) \
-C $(build)/$(io386_dir) \
$(CROSS_TOOLS) \
SHARED=yes \
PREFIX="/" \
DESTDIR="$(INSTALL)" \
install \

io386_output := \
io386

io386_libraries :=

io386_configure :=

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