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Add initial support for NUCLEO-L073RZ board.
This is a typical Nucleo-64 board, so most files are reused
from already supported Nucleo boards with small changes.

Signed-off-by: Ilya Tagunov <tagunil@gmail.com>
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tagunil authored and galak committed Mar 13, 2018
1 parent b6da79c commit 92c7bd0
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3 changes: 3 additions & 0 deletions boards/arm/nucleo_l073rz/CMakeLists.txt
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zephyr_library()
zephyr_library_sources(pinmux.c)
zephyr_library_include_directories(${PROJECT_SOURCE_DIR}/drivers)
10 changes: 10 additions & 0 deletions boards/arm/nucleo_l073rz/Kconfig.board
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# Kconfig - STM32 Nucleo-64 development board with STM32L073RZ MCU configuration
#
# Copyright (c) 2018 Ilya Tagunov <tagunil@gmail.com>
#
# SPDX-License-Identifier: Apache-2.0
#

config BOARD_NUCLEO_L073RZ
bool "NUCLEO-64 L073RZ Development Board"
depends on SOC_STM32L073XZ
20 changes: 20 additions & 0 deletions boards/arm/nucleo_l073rz/Kconfig.defconfig
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# Kconfig - STM32 Nucleo-64 development board with STM32L073RZ MCU
#
# Copyright (c) 2018 Ilya Tagunov <tagunil@gmail.com>
#
# SPDX-License-Identifier: Apache-2.0
#

if BOARD_NUCLEO_L073RZ

config BOARD
default nucleo_l073rz

if UART_CONSOLE

config UART_STM32_PORT_2
default y

endif # UART_CONSOLE

endif # BOARD_NUCLEO_L073RZ
1 change: 1 addition & 0 deletions boards/arm/nucleo_l073rz/board.cmake
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include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
26 changes: 26 additions & 0 deletions boards/arm/nucleo_l073rz/board.h
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/*
* Copyright (c) 2018 Ilya Tagunov <tagunil@gmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/

#ifndef __INC_BOARD_H
#define __INC_BOARD_H

#include <soc.h>

/* USER push button */
#define USER_PB_GPIO_PORT "GPIOC"
#define USER_PB_GPIO_PIN 13

/* LD2 green LED */
#define LD2_GPIO_PORT "GPIOA"
#define LD2_GPIO_PIN 5

/* Create aliases to make the basic samples work */
#define SW0_GPIO_NAME USER_PB_GPIO_PORT
#define SW0_GPIO_PIN USER_PB_GPIO_PIN
#define LED0_GPIO_PORT LD2_GPIO_PORT
#define LED0_GPIO_PIN LD2_GPIO_PIN

#endif /* __INC_BOARD_H */
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173 changes: 173 additions & 0 deletions boards/arm/nucleo_l073rz/doc/nucleol073rz.rst
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.. _nucleo_l073rz_board:

ST Nucleo L073RZ
################

Overview
********
The STM32 Nucleo-64 development board with STM32L073RZ MCU, supports Arduino and ST morpho connectivity.

The STM32 Nucleo board provides an affordable, and flexible way for users to try out new concepts,
and build prototypes with the STM32 microcontroller, choosing from the various
combinations of performance, power consumption, and features.

The Arduino* Uno V3 connectivity support and the ST morpho headers allow easy functionality
expansion of the STM32 Nucleo open development platform with a wide choice of
specialized shields.

The STM32 Nucleo board integrates the ST-LINK/V2-1 debugger and programmer.

The STM32 Nucleo board comes with the STM32 comprehensive software HAL library together
with various packaged software examples.

.. image:: img/nucleo_l073rz_board.jpg
:width: 500px
:height: 367px
:align: center
:alt: Nucleo L073RZ

More information about the board can be found at the `Nucleo L073RZ website`_.

Hardware
********
Nucleo L073RZ provides the following hardware components:

- STM32 microcontroller in QFP64 package
- Two types of extension resources:

- Arduino* Uno V3 connectivity
- ST morpho extension pin headers for full access to all STM32 I/Os

- ARM* mbed*
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector:

- Selection-mode switch to use the kit as a standalone ST-LINK/V2-1

- Flexible board power supply:

- USB VBUS or external source (3.3V, 5V, 7 - 12V)
- Power management access point

- Three LEDs:

- USB communication (LD1), user LED (LD2), power LED (LD3)

- Two push-buttons: USER and RESET
- USB re-enumeration capability. Three different interfaces supported on USB:

- Virtual COM port
- Mass storage
- Debug port

- Support of wide choice of Integrated Development Environments (IDEs) including:

- IAR
- ARM Keil
- GCC-based IDEs

More information about STM32L073RZ can be found in the
`STM32L0x3 reference manual`_


Supported Features
==================

The Zephyr nucleo_l073rz board configuration supports the following hardware features:

+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | reset and clock control |
+-----------+------------+-------------------------------------+

Other hardware features are not yet supported in this Zephyr port.

The default configuration can be found in the defconfig file:
``boards/arm/nucleo_l073rz/nucleo_l073rz_defconfig``

Connections and IOs
===================

Each of the GPIO pins can be configured by software as output (push-pull or open-drain), as
input (with or without pull-up or pull-down), or as peripheral alternate function. Most of the
GPIO pins are shared with digital or analog alternate functions. All GPIOs are high current
capable except for analog inputs.

Board connectors:
-----------------
.. image:: img/nucleo_l073rz_connectors.png
:width: 800px
:align: center
:height: 619px
:alt: Nucleo L073RZ connectors

Default Zephyr Peripheral Mapping:
----------------------------------

- UART_1_TX : PB6
- UART_1_RX : PB7
- UART_2_TX : PA2
- UART_2_RX : PA3

For mode details please refer to `STM32 Nucleo-64 board User Manual`_.

Programming and Debugging
*************************

Applications for the ``nucleo_l073rz`` board configuration can be built and
flashed in the usual way (see :ref:`build_an_application` and
:ref:`application_run` for more details).

Flashing
========

Nucleo L073RZ board includes an ST-LINK/V2-1 embedded debug tool interface.
This interface is supported by the openocd version included in the Zephyr SDK.

Flashing an application to Nucleo L073RZ
----------------------------------------

Here is an example for the :ref:`blinky-sample` application.

.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: nucleo_l073rz
:goals: build flash

You will see the LED blinking every second.

Debugging
=========

You can debug an application in the usual way. Here is an example for the
:ref:`hello_world` application.

.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: nucleo_l073rz
:maybe-skip-config:
:goals: debug

References
**********

.. target-notes::

.. _Nucleo L073RZ website:
http://www.st.com/en/evaluation-tools/nucleo-l073rz.html

.. _STM32L0x3 reference manual:
http://www.st.com/resource/en/reference_manual/dm00095744.pdf

.. _STM32 Nucleo-64 board User Manual:
http://www.st.com/resource/en/user_manual/dm00105823.pdf

32 changes: 32 additions & 0 deletions boards/arm/nucleo_l073rz/nucleo_l073rz.dts
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/*
* Copyright (c) 2018 Ilya Tagunov <tagunil@gmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/

/dts-v1/;
#include <st/stm32l073.dtsi>

/ {
model = "STMicroelectronics STM32L073RZ-NUCLEO board";
compatible = "st,stm32l073rz-nucleo", "st,stm32l073";

chosen {
zephyr,console = &usart2;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
};
};

&usart1 {
current-speed = <115200>;
pinctrl-0 = <&usart1_pins_a>;
pinctrl-names = "default";
};

&usart2 {
current-speed = <115200>;
pinctrl-0 = <&usart2_pins_a>;
pinctrl-names = "default";
status = "ok";
};
9 changes: 9 additions & 0 deletions boards/arm/nucleo_l073rz/nucleo_l073rz.yaml
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identifier: nucleo_l073rz
name: NUCLEO-L073RZ
type: mcu
arch: arm
toolchain:
- zephyr
- gccarmemb
ram: 20
flash: 192
42 changes: 42 additions & 0 deletions boards/arm/nucleo_l073rz/nucleo_l073rz_defconfig
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# Zephyr Kernel Configuration
CONFIG_ARM=y
CONFIG_SOC_SERIES_STM32L0X=y

# Platform Configuration
CONFIG_SOC_STM32L073XZ=y
CONFIG_BOARD_NUCLEO_L073RZ=y

# General Kernel Options
CONFIG_CORTEX_M_SYSTICK=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32000000

# Serial Drivers
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y

# Pinmux Driver
CONFIG_PINMUX=y

# GPIO Controller
CONFIG_GPIO=y

# Clock configuration
CONFIG_CLOCK_CONTROL=y
# SYSCLK selection
CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
# HSE configuration
CONFIG_CLOCK_STM32_HSE_CLOCK=8000000
# however, the board does not have an external oscillator, so just use
# the 8MHz clock signal coming from integrated STLink
CONFIG_CLOCK_STM32_HSE_BYPASS=y
# PLL configuration
CONFIG_CLOCK_STM32_PLL_SRC_HSE=y
# produce 32MHz clock at PLL output
CONFIG_CLOCK_STM32_PLL_MULTIPLIER=8
CONFIG_CLOCK_STM32_PLL_DIVISOR=2
CONFIG_CLOCK_STM32_AHB_PRESCALER=1
CONFIG_CLOCK_STM32_APB1_PRESCALER=1
CONFIG_CLOCK_STM32_APB2_PRESCALER=1
37 changes: 37 additions & 0 deletions boards/arm/nucleo_l073rz/pinmux.c
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/*
* Copyright (c) 2018 Ilya Tagunov <tagunil@gmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/

#include <kernel.h>
#include <device.h>
#include <init.h>
#include <pinmux.h>
#include <sys_io.h>

#include <pinmux/stm32/pinmux_stm32.h>

/* pin assignments for NUCLEO-L073RZ board */
static const struct pin_config pinconf[] = {
#ifdef CONFIG_UART_STM32_PORT_1
{STM32_PIN_PB6, STM32L0_PINMUX_FUNC_PB6_USART1_TX},
{STM32_PIN_PB7, STM32L0_PINMUX_FUNC_PB7_USART1_RX},
#endif /* CONFIG_UART_STM32_PORT_1 */
#ifdef CONFIG_UART_STM32_PORT_2
{STM32_PIN_PA2, STM32L0_PINMUX_FUNC_PA2_USART2_TX},
{STM32_PIN_PA3, STM32L0_PINMUX_FUNC_PA3_USART2_RX},
#endif /* CONFIG_UART_STM32_PORT_2 */
};

static int pinmux_stm32_init(struct device *port)
{
ARG_UNUSED(port);

stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf));

return 0;
}

SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1,
CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY);
27 changes: 27 additions & 0 deletions boards/arm/nucleo_l073rz/support/openocd.cfg
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# This is an ST NUCLEO-L073RZ board with single STM32L073RZ chip.
# http://www.st.com/en/evaluation-tools/nucleo-l073rz.html
source [find interface/stlink-v2-1.cfg]

transport select hla_swd

set WORKAREASIZE 0x2000

source [find target/stm32l0.cfg]

# Add the second flash bank.
set _FLASHNAME $_CHIPNAME.flash1
flash bank $_FLASHNAME stm32lx 0 0 0 0 $_TARGETNAME

# There is only system reset line and JTAG/SWD command can be issued when SRST
reset_config srst_only

$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}

$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}

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