FEAT: added myir board support for stm32mp135x

Signed-off-by: alexhu <fan.hu@myirtech.com>
Change-Id: I0a05601558fe4203d302fac863a0a770b8ffbe45

FEAT: added myir board support for stm32mp135x

Signed-off-by: alexhu <fan.hu@myirtech.com>
Change-Id: I0a05601558fe4203d302fac863a0a770b8ffbe45

Update on official 3.9.0 OP-TEE OS release

Most of STM32MP1 code have been upstream including the SCMI
server and protocol (clock and reset) management.

On top of 3.9.0:
- Update device tree to align with Linux kernel 3.9.0
- Add support of CPU dynamic frequency switch (for Linux kernel DVFS)
- Add low power management (including DDR services)
- Add SIP specific services :
  - Power domain control
  - Calibration management

plat-stm32mp1: pm: new CFG_STM32MP15_PM_CONTEX_VERSION

Introduce new configuration switch CFG_STM32MP15_PM_CONTEX_VERSION to
set the PM context mailbox version used to provide TF-A BL2 data
needed to wake-up the platform from a suspended state. Default
version embedded is latest version 2 which relates to latest
TF-A delivery. Version 1 shall be used when platform boots with a
TF-A BL2 image that supports version 2 only.

Change-Id: I010025023439eb6530b486f5e9ab4903195b3f8f
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

stm32mp1: pm: add PMIC context save/restore sequences

Prevent power leakage by setting CPU supply to minimum voltage defined in
device tree when entering in CSTOP or in CSTANDBY.
When exiting from CSTOP, set nomimal OPP voltage using saved PLL1 settings.

Change-Id: I2471a33a7575111526d8a80edc3747d1cc0a65c9
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/161101
Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: CIBUILD <smet-aci-builds@lists.codex.cro.st.com>
Reviewed-by: Lionel DEBIEVE <lionel.debieve@st.com>
Tested-by: Lionel DEBIEVE <lionel.debieve@st.com>

STM32MP release 3.0

STM32MP release 2.0

stm32mp1: enable retention regulators only for standby with DDR

Enable retention regulators only for standby DDR in self refresh.
Disable them for all other use cases. The goal is to reduce power
consumption in shut-down (standby DDR off).
No need to operate at init here, already done in previous bootloader
stage.

Change-Id: Ie5527fdd03b92f7e6869952311ae6225ad93eceb
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/136427
Reviewed-by: CITOOLS <smet-aci-reviews@lists.codex.cro.st.com>
Reviewed-by: Etienne CARRIERE <etienne.carriere@st.com>

STM32MP release 1.3