updated zig v0.14.0

* latest espressif/llvm release add `-mcpu=esp32p4` w/ `xesppie` cpu-feature
kassane · Aug 16, 2024 · 71731e3 · 71731e3
1 parent 6d1b507
commit 71731e3
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diff --git a/.devcontainer/Dockerfile b/.devcontainer/Dockerfile
@@ -22,7 +22,7 @@ ENV QEMU_URL=https://github.com/espressif/qemu/releases/download/esp-develop-8.2
 
 # Zig v0.14.0 - xtensa
 ENV ZIG_REL=zig-relsafe-espressif-x86_64-linux-musl-baseline
-ENV ZIG_SHA256=a7a23429a8cbc4cd872a25aafac6dbab24b9d20f3fd0b5624fac6fe20f16425e
+ENV ZIG_SHA256=5792bd149b6b53cefe938a4501c5682d85c202ef4c282d7f09dd6028d7284d4f
 ENV ZIG_DIST=${ZIG_REL}.tar.xz
 ENV ZIG_URL=https://github.com/kassane/zig-espressif-bootstrap/releases/download/0.14.0-xtensa-dev/${ZIG_DIST}
 

diff --git a/README.md b/README.md
@@ -23,7 +23,7 @@ This project aims to integrate Zig language and toolchain with the [Espressif Io
 | esp32-s3 | `-Dtarget=xtensa-freestanding-none -Dcpu=esp32s3` |
 | esp32-c2/c3 | `-Dtarget=riscv32-freestanding-none -Dcpu=generic_rv32+c+m` |
 | esp32-h2/c5/c6 | `-Dtarget=riscv32-freestanding-none -Dcpu=generic_rv32+a+c+m` |
-| esp32-p4 | `-Dtarget=riscv32-freestanding-eabihf -Dcpu=generic_rv32+a+c+f+m` |
+| esp32-p4 | `-Dtarget=riscv32-freestanding-eabihf -Dcpu=esp32p4` |
 
 <br>
 <sub>

diff --git a/build.zig b/build.zig
@@ -596,10 +596,10 @@ const riscv_targets = &[_]std.Target.Query{
     // esp32-p4
     .{
         .cpu_arch = .riscv32,
-        .cpu_model = .{ .explicit = &std.Target.riscv.cpu.generic_rv32 },
+        .cpu_model = .{ .explicit = &std.Target.riscv.cpu.esp32p4 },
         .os_tag = .freestanding,
         .abi = .eabihf,
-        .cpu_features_add = std.Target.riscv.featureSet(&.{ .m, .a, .c, .f }),
+        .cpu_features_sub = std.Target.riscv.featureSet(&.{.xesppie}), // FIXME
     },
 };
 const xtensa_targets = &[_]std.Target.Query{

diff --git a/main/CMakeLists.txt b/main/CMakeLists.txt
@@ -68,7 +68,7 @@ if(CONFIG_IDF_TARGET_ARCH_RISCV)
         set(TARGET_CPU_MODEL "generic_rv32+m+a+c")
     elseif(CONFIG_IDF_TARGET_ESP32P4)
         string(REGEX REPLACE "-none" "-eabihf" ZIG_TARGET ${ZIG_TARGET})
-        set(TARGET_CPU_MODEL "generic_rv32+m+a+c+f")
+        set(TARGET_CPU_MODEL "esp32p4-xesppie")
     else()
         set(TARGET_CPU_MODEL "generic_rv32+m+c")
     endif()