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clk: rockchip: fix error for unknown clocks
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There is a clk == NULL check after the switch to check for
unsupported clk types. Since clk is re-assigned in a loop,
this check is useless right now for anything but the first
round. Let's fix this up by assigning clk = NULL in the
loop before the switch statement.

Fixes: a245fec ("clk: rockchip: add basic infrastructure for clock branches")
Cc: stable@vger.kernel.org
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
[added fixes + stable-cc]
Link: https://lore.kernel.org/r/20240325193609.237182-6-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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sre authored and mmind committed Aug 30, 2024
1 parent 2e7b3da commit 12fd64b
Showing 1 changed file with 2 additions and 1 deletion.
3 changes: 2 additions & 1 deletion drivers/clk/rockchip/clk.c
Original file line number Diff line number Diff line change
Expand Up @@ -450,12 +450,13 @@ void rockchip_clk_register_branches(struct rockchip_clk_provider *ctx,
struct rockchip_clk_branch *list,
unsigned int nr_clk)
{
struct clk *clk = NULL;
struct clk *clk;
unsigned int idx;
unsigned long flags;

for (idx = 0; idx < nr_clk; idx++, list++) {
flags = list->flags;
clk = NULL;

/* catch simple muxes */
switch (list->branch_type) {
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