Waldemar Koprek [waldemar.koprek@psi.ch]
Oliver Bründler [oli.bruendler@gmx.ch]
This library is published under PSI HDL Library License, which is LGPL plus some additional exceptions to clarify the LGPL terms in the context of firmware development.
For details, refer to the Datasheet
See Changelog
The required folder structure looks as given below (folder names must be matched exactly).
Alternatively the repository psi_fpga_all can be used. This repo contains all FPGA related repositories as submodules in the correct folder structure.
- TCL
- PsiSim (2.1.0 or higher, for development only)
- PsiIpPackage (2.1.0, for development only )
- VHDL
- psi_common (2.5.0 or higher)
- psi_tb (2.0.0 or higher)
- VivadoIp
Dependencies can also be checked out using the python script scripts/dependencies.py. For details, refer to the help of the script:
python dependencies.py -help
Note that the dependencies package must be installed in order to run the script.
This IP-core implements a simple general purpose data recorder.
Main features are:
- Pre- and Post-Trigger Recording
- Self-Trigger (based on signal levels)
- Different trigger modes (normal, free-running, self-trigger, external-trigger)
- Up to 8 channels
- Configurable sample depth
For details, refer to the Datasheet
A regression test script for Modelsim is present. To run the regression test, execute the following command in modelsim from within the directory sim
source ./run.tcl