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PR target/50465
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	* config/avr/avr-protos.h (output_reload_insisf): Don't pass insn.
	* config/avr/avr.md (*reload_insi, *reload_insf): Change call to
	output_reload_insisf.
	(adjust_len): Set default to "no".
	Remove alternative "yes".  Add alternatives: "mov8", "mov16",
	"mov32", "ashlqi", "ashrqi", "lshrqi", "ashlhi", "ashrhi",
	"lshrhi", "ashlsi, "ashrsi", "lshrsi".
	(*movqi, *movhi, *movsi, *ashlqi3, ashlhi3, ashlsi3,
	*ashlhi3_const, *ashlsi3_const, ashrqi3, ashrhi3, ashrsi3,
	*ashrhi3_const, *ashrsi3_const, *lshrqi3, lshrhi3, *lshrhi3_const,
	*lshrsi3_const): Set attribute "adjust_len".
	* config/avr/avr.c (output_reload_insisf): Remove parameter "insn".
	(output_movsisf): Don't pass insn to output_reload_insisf.
	(adjust_insn_length): Handle new alternatives to adjust_len.
	Remove handling of ADJUST_LEN_YES.  Clean-up code.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@179191 138bc75d-0d04-0410-961f-82ee72b054a4
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gjl committed Sep 26, 2011
1 parent c68c617 commit 5bca95a
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Showing 4 changed files with 99 additions and 135 deletions.
19 changes: 19 additions & 0 deletions gcc/ChangeLog
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Original file line number Diff line number Diff line change
@@ -1,3 +1,22 @@
2011-09-26 Georg-Johann Lay <avr@gjlay.de>

PR target/50465
* config/avr/avr-protos.h (output_reload_insisf): Don't pass insn.
* config/avr/avr.md (*reload_insi, *reload_insf): Change call to
output_reload_insisf.
(adjust_len): Set default to "no".
Remove alternative "yes". Add alternatives: "mov8", "mov16",
"mov32", "ashlqi", "ashrqi", "lshrqi", "ashlhi", "ashrhi",
"lshrhi", "ashlsi, "ashrsi", "lshrsi".
(*movqi, *movhi, *movsi, *ashlqi3, ashlhi3, ashlsi3,
*ashlhi3_const, *ashlsi3_const, ashrqi3, ashrhi3, ashrsi3,
*ashrhi3_const, *ashrsi3_const, *lshrqi3, lshrhi3, *lshrhi3_const,
*lshrsi3_const): Set attribute "adjust_len".
* config/avr/avr.c (output_reload_insisf): Remove parameter "insn".
(output_movsisf): Don't pass insn to output_reload_insisf.
(adjust_insn_length): Handle new alternatives to adjust_len.
Remove handling of ADJUST_LEN_YES. Clean-up code.

2011-09-26 Eric Botcazou <ebotcazou@adacore.com>

* ifcvt.c (noce_try_cmove_arith): Use may_trap_or_fault_p in lieu of
Expand Down
2 changes: 1 addition & 1 deletion gcc/config/avr/avr-protos.h
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Original file line number Diff line number Diff line change
Expand Up @@ -88,7 +88,7 @@ extern bool avr_popcount_each_byte (rtx, int, int);
extern int extra_constraint_Q (rtx x);
extern int adjust_insn_length (rtx insn, int len);
extern const char* output_reload_inhi (rtx*, rtx, int*);
extern const char *output_reload_insisf (rtx insn, rtx *operands, rtx clobber, int *len);
extern const char* output_reload_insisf (rtx*, rtx, int*);
extern void notice_update_cc (rtx body, rtx insn);
extern void print_operand (FILE *file, rtx x, int code);
extern void print_operand_address (FILE *file, rtx addr);
Expand Down
163 changes: 42 additions & 121 deletions gcc/config/avr/avr.c
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Original file line number Diff line number Diff line change
Expand Up @@ -2691,7 +2691,7 @@ output_movsisf (rtx insn, rtx operands[], int *l)
else if (CONST_INT_P (src)
|| CONST_DOUBLE_P (src))
{
return output_reload_insisf (insn, operands, NULL_RTX, real_l);
return output_reload_insisf (operands, NULL_RTX, real_l);
}
else if (CONSTANT_P (src))
{
Expand Down Expand Up @@ -5019,7 +5019,7 @@ avr_rotate_bytes (rtx operands[])
int
adjust_insn_length (rtx insn, int len)
{
rtx patt, set;
rtx *op = recog_data.operand;
enum attr_adjust_len adjust_len;

/* Some complex insns don't need length adjustment and therefore
Expand All @@ -5036,131 +5036,53 @@ adjust_insn_length (rtx insn, int len)

adjust_len = get_attr_adjust_len (insn);

if (adjust_len != ADJUST_LEN_YES)
if (adjust_len == ADJUST_LEN_NO)
{
rtx *op = recog_data.operand;
/* Nothing to adjust: The length from attribute "length" is fine.
This is the default. */

if (adjust_len == ADJUST_LEN_NO)
{
/* Nothing to adjust: The length from attribute "length" is fine. */

return len;
}

/* Extract insn's operands. */
return len;
}

/* Extract insn's operands. */

extract_constrain_insn_cached (insn);

/* Dispatch to right function. */

switch (adjust_len)
{
case ADJUST_LEN_RELOAD_IN16: output_reload_inhi (op, op[2], &len); break;
case ADJUST_LEN_RELOAD_IN32: output_reload_insisf (op, op[2], &len); break;

extract_constrain_insn_cached (insn);

/* Dispatch to right function. */
case ADJUST_LEN_OUT_BITOP: avr_out_bitop (insn, op, &len); break;

switch (adjust_len)
{
case ADJUST_LEN_RELOAD_IN16:
output_reload_inhi (op, op[2], &len);
break;

case ADJUST_LEN_RELOAD_IN32:
output_reload_insisf (insn, op, op[2], &len);
break;

case ADJUST_LEN_OUT_BITOP:
avr_out_bitop (insn, op, &len);
break;

case ADJUST_LEN_OUT_PLUS:
avr_out_plus (op, &len);
break;

case ADJUST_LEN_TSTHI: avr_out_tsthi (insn, op, &len); break;
case ADJUST_LEN_TSTSI: avr_out_tstsi (insn, op, &len); break;
case ADJUST_LEN_COMPARE: avr_out_compare (insn, op, &len); break;

default:
gcc_unreachable();
}
case ADJUST_LEN_OUT_PLUS: avr_out_plus (op, &len); break;

return len;
} /* adjust_length != ADJUST_LEN_YES */

/* adjust_len == "yes": Analyse insn by hand. */

patt = PATTERN (insn);
case ADJUST_LEN_MOV8: output_movqi (insn, op, &len); break;
case ADJUST_LEN_MOV16: output_movhi (insn, op, &len); break;
case ADJUST_LEN_MOV32: output_movsisf (insn, op, &len); break;

case ADJUST_LEN_TSTHI: avr_out_tsthi (insn, op, &len); break;
case ADJUST_LEN_TSTSI: avr_out_tstsi (insn, op, &len); break;
case ADJUST_LEN_COMPARE: avr_out_compare (insn, op, &len); break;

if (GET_CODE (patt) == SET)
{
rtx op[10];
op[1] = SET_SRC (patt);
op[0] = SET_DEST (patt);
if (general_operand (op[1], VOIDmode)
&& general_operand (op[0], VOIDmode))
{
switch (GET_MODE (op[0]))
{
case QImode:
output_movqi (insn, op, &len);
break;
case HImode:
output_movhi (insn, op, &len);
break;
case SImode:
case SFmode:
output_movsisf (insn, op, &len);
break;
default:
break;
}
}
}
set = single_set (insn);
if (set)
{
rtx op[10];
case ADJUST_LEN_LSHRQI: lshrqi3_out (insn, op, &len); break;
case ADJUST_LEN_LSHRHI: lshrhi3_out (insn, op, &len); break;
case ADJUST_LEN_LSHRSI: lshrsi3_out (insn, op, &len); break;

op[1] = SET_SRC (set);
op[0] = SET_DEST (set);
case ADJUST_LEN_ASHRQI: ashrqi3_out (insn, op, &len); break;
case ADJUST_LEN_ASHRHI: ashrhi3_out (insn, op, &len); break;
case ADJUST_LEN_ASHRSI: ashrsi3_out (insn, op, &len); break;

if (GET_CODE (op[1]) == ASHIFT
|| GET_CODE (op[1]) == ASHIFTRT
|| GET_CODE (op[1]) == LSHIFTRT)
{
rtx ops[10];
ops[0] = op[0];
ops[1] = XEXP (op[1],0);
ops[2] = XEXP (op[1],1);
switch (GET_CODE (op[1]))
{
case ASHIFT:
switch (GET_MODE (op[0]))
{
case QImode: ashlqi3_out (insn,ops,&len); break;
case HImode: ashlhi3_out (insn,ops,&len); break;
case SImode: ashlsi3_out (insn,ops,&len); break;
default: break;
}
break;
case ASHIFTRT:
switch (GET_MODE (op[0]))
{
case QImode: ashrqi3_out (insn,ops,&len); break;
case HImode: ashrhi3_out (insn,ops,&len); break;
case SImode: ashrsi3_out (insn,ops,&len); break;
default: break;
}
break;
case LSHIFTRT:
switch (GET_MODE (op[0]))
{
case QImode: lshrqi3_out (insn,ops,&len); break;
case HImode: lshrhi3_out (insn,ops,&len); break;
case SImode: lshrsi3_out (insn,ops,&len); break;
default: break;
}
break;
default:
break;
}
}
case ADJUST_LEN_ASHLQI: ashlqi3_out (insn, op, &len); break;
case ADJUST_LEN_ASHLHI: ashlhi3_out (insn, op, &len); break;
case ADJUST_LEN_ASHLSI: ashlsi3_out (insn, op, &len); break;

default:
gcc_unreachable();
}

return len;
}

Expand Down Expand Up @@ -7064,7 +6986,7 @@ avr_hard_regno_mode_ok (int regno, enum machine_mode mode)
}


/* A helper for `output_reload_insisf'. */
/* A helper for `output_reload_insisf' and `output_reload_inhi'. */
/* Set 32-bit register OP[0] to compile-time constant OP[1].
CLOBBER_REG is a QI clobber register or NULL_RTX.
LEN == NULL: output instructions.
Expand Down Expand Up @@ -7329,8 +7251,7 @@ output_reload_inhi (rtx *op, rtx clobber_reg, int *plen)
Return "". */

const char *
output_reload_insisf (rtx insn ATTRIBUTE_UNUSED,
rtx *op, rtx clobber_reg, int *len)
output_reload_insisf (rtx *op, rtx clobber_reg, int *len)
{
gcc_assert (REG_P (op[0])
&& CONSTANT_P (op[1]));
Expand Down
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