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16 results for source starred repositories written in Verilog
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Open source FPGA-based NIC and platform for in-network compute

Verilog 1,854 439 Updated Jul 5, 2024
Verilog 1,466 310 Updated Mar 17, 2025

An FPGA-based USB 1.1 (full-speed) device core to implement USB-serial, USB-camera, USB-audio, USB-hid, etc. It requires only 3 FPGA common IOs rather than additional chips. 基于FPGA的USB 1.1 (full-sp…

Verilog 720 120 Updated Dec 6, 2024

A minimal Linux-capable 64-bit RISC-V SoC built around CVA6

Verilog 247 62 Updated Apr 10, 2025

Single/Multi-channel Full Speed USB interface for FPGA and ASIC designs

Verilog 166 13 Updated Mar 10, 2024

Digitally synthesizable architecture for SerDes using Skywater Open PDK 130 nm technology.

Verilog 152 33 Updated Mar 26, 2022

Universal Memory Interface (UMI)

Verilog 145 13 Updated Mar 31, 2025

SOFA (Skywater Opensource FPGAs) based on Skywater 130nm PDK and OpenFPGA

Verilog 138 28 Updated Mar 17, 2023

USB Serial on the TinyFPGA BX

Verilog 136 39 Updated Jun 20, 2021

IDEA project source files

Verilog 106 41 Updated Nov 8, 2024

Structural Netlist API (and more) for EDA post synthesis flow development

Verilog 93 14 Updated Apr 11, 2025

EDA physical synthesis optimization kit

Verilog 51 11 Updated Nov 13, 2023

High Speed Data Acquisition over HDMI - FPGA implementation

Verilog 40 7 Updated Mar 24, 2025
Verilog 15 2 Updated Feb 3, 2023
Verilog 8 4 Updated Mar 24, 2023