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Merged master:559685d0bbd into amd-gfx:66e2e9d7a70
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Local branch amd-gfx 66e2e9d Merged master:11b1eeeaec6 into amd-gfx:6cf36500793
Remote branch master 559685d [gn build] Port 804d968
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Sw authored and Sw committed Jul 2, 2020
2 parents 66e2e9d + 559685d commit bee70b7
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Showing 50 changed files with 351 additions and 152 deletions.
1 change: 0 additions & 1 deletion clang-tools-extra/clang-tidy/tool/run-clang-tidy.py
Original file line number Diff line number Diff line change
Expand Up @@ -277,7 +277,6 @@ def main():
tmpdir = tempfile.mkdtemp()

# Build up a big regexy filter from all command line arguments.
args.files = [re.escape(f) for f in args.files]
file_name_re = re.compile('|'.join(args.files))

return_code = 0
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5 changes: 4 additions & 1 deletion clang/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -517,7 +517,10 @@ add_subdirectory(include)

# All targets below may depend on all tablegen'd files.
get_property(CLANG_TABLEGEN_TARGETS GLOBAL PROPERTY CLANG_TABLEGEN_TARGETS)
add_custom_target(clang-tablegen-targets DEPENDS ${CLANG_TABLEGEN_TARGETS})
add_custom_target(clang-tablegen-targets
DEPENDS
omp_gen
${CLANG_TABLEGEN_TARGETS})
set_target_properties(clang-tablegen-targets PROPERTIES FOLDER "Misc")
list(APPEND LLVM_COMMON_DEPENDS clang-tablegen-targets)

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7 changes: 6 additions & 1 deletion clang/include/clang/Basic/arm_sve.td
Original file line number Diff line number Diff line change
Expand Up @@ -1110,7 +1110,7 @@ defm SVFCVTZS_S64_F32 : SInstCvtMXZ<"svcvt_s64[_f32]", "ddPM", "dPM", "l", "aar

let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16)" in {
defm SVCVT_BF16_F32 : SInstCvtMXZ<"svcvt_bf16[_f32]", "ddPM", "dPM", "b", "aarch64_sve_fcvt_bf16f32">;
defm SVCVTNT_BF16_F32 : SInstCvtMX<"svcvtnt_bf16[_f32]", "ddPM", "dPM", "b", "aarch64_sve_fcvtnt_bf16f32">;
def SVCVTNT_BF16_F32 : SInst<"svcvtnt_bf16[_f32]", "ddPM", "b", MergeOp1, "aarch64_sve_fcvtnt_bf16f32", [IsOverloadNone]>;
}

// svcvt_s##_f64
Expand Down Expand Up @@ -1204,6 +1204,11 @@ def SVCOMPACT : SInst<"svcompact[_{d}]", "dPd", "ilUiUlfd", MergeNo
// instruction such as DUP (indexed) if the lane index fits the range of the
// instruction's immediate.
def SVDUP_LANE : SInst<"svdup_lane[_{d}]", "ddL", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_tbl">;
let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16)" in {
def SVDUP_LANE_BF16 :
SInst<"svdup_lane[_{d}]", "ddL", "b", MergeNone, "aarch64_sve_tbl">;
}

def SVDUPQ_LANE : SInst<"svdupq_lane[_{d}]", "ddn", "csilUcUsUiUlhfd", MergeNone, "aarch64_sve_dupq_lane">;
let ArchGuard = "defined(__ARM_FEATURE_SVE_BF16)" in {
def SVDUPQ_LANE_BF16 : SInst<"svdupq_lane[_{d}]", "ddn", "b", MergeNone, "aarch64_sve_dupq_lane">;
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2 changes: 1 addition & 1 deletion clang/lib/Driver/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -68,7 +68,7 @@ add_clang_library(clangDriver
ToolChains/RISCVToolchain.cpp
ToolChains/Solaris.cpp
ToolChains/TCE.cpp
ToolChains/VE.cpp
ToolChains/VEToolchain.cpp
ToolChains/WebAssembly.cpp
ToolChains/XCore.cpp
ToolChains/PPCLinux.cpp
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2 changes: 1 addition & 1 deletion clang/lib/Driver/Driver.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -43,7 +43,7 @@
#include "ToolChains/RISCVToolchain.h"
#include "ToolChains/Solaris.h"
#include "ToolChains/TCE.h"
#include "ToolChains/VE.h"
#include "ToolChains/VEToolchain.h"
#include "ToolChains/WebAssembly.h"
#include "ToolChains/XCore.h"
#include "clang/Basic/Version.h"
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Original file line number Diff line number Diff line change
Expand Up @@ -6,7 +6,7 @@
//
//===----------------------------------------------------------------------===//

#include "VE.h"
#include "VEToolchain.h"
#include "CommonArgs.h"
#include "clang/Driver/Compilation.h"
#include "clang/Driver/Driver.h"
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File renamed without changes.
12 changes: 6 additions & 6 deletions clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvtnt.c
Original file line number Diff line number Diff line change
Expand Up @@ -10,18 +10,18 @@
#define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4
#endif

svbfloat16_t test_svcvtnt_bf16_f32_x(svbool_t pg, svfloat32_t op) {
svbfloat16_t test_svcvtnt_bf16_f32_x(svbfloat16_t even, svbool_t pg, svfloat32_t op) {
// CHECK-LABEL: test_svcvtnt_bf16_f32_x
// CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x bfloat> @llvm.aarch64.sve.fcvtnt.bf16f32(<vscale x 8 x bfloat> undef, <vscale x 8 x i1> %[[PG]], <vscale x 4 x float> %op)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x bfloat> @llvm.aarch64.sve.fcvtnt.bf16f32(<vscale x 8 x bfloat> %even, <vscale x 8 x i1> %[[PG]], <vscale x 4 x float> %op)
// CHECK: ret <vscale x 8 x bfloat> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svcvtnt_bf16, _f32, _x, )(pg, op);
return SVE_ACLE_FUNC(svcvtnt_bf16, _f32, _x, )(even, pg, op);
}

svbfloat16_t test_svcvtnt_bf16_f32_m(svbfloat16_t inactive, svbool_t pg, svfloat32_t op) {
svbfloat16_t test_svcvtnt_bf16_f32_m(svbfloat16_t even, svbool_t pg, svfloat32_t op) {
// CHECK-LABEL: test_svcvtnt_bf16_f32_m
// CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x bfloat> @llvm.aarch64.sve.fcvtnt.bf16f32(<vscale x 8 x bfloat> %inactive, <vscale x 8 x i1> %[[PG]], <vscale x 4 x float> %op)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x bfloat> @llvm.aarch64.sve.fcvtnt.bf16f32(<vscale x 8 x bfloat> %even, <vscale x 8 x i1> %[[PG]], <vscale x 4 x float> %op)
// CHECK: ret <vscale x 8 x bfloat> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svcvtnt_bf16, _f32, _m, )(inactive, pg, op);
return SVE_ACLE_FUNC(svcvtnt_bf16, _f32, _m, )(even, pg, op);
}
10 changes: 10 additions & 0 deletions clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup-bfloat.c
Original file line number Diff line number Diff line change
Expand Up @@ -51,3 +51,13 @@ svbfloat16_t test_svdup_n_bf16_x(svbool_t pg, bfloat16_t op) {
// expected-warning@+1 {{implicit declaration of function 'svdup_n_bf16_x'}}
return SVE_ACLE_FUNC(svdup, _n, _bf16_x, )(pg, op);
}

svbfloat16_t test_svdup_lane_bf16(svbfloat16_t data, uint16_t index)
{
// CHECK-LABEL: test_svdup_lane_bf16
// CHECK: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %index)
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x bfloat> @llvm.aarch64.sve.tbl.nxv8bf16(<vscale x 8 x bfloat> %data, <vscale x 8 x i16> %[[DUP]])
// CHECK: ret <vscale x 8 x bfloat> %[[INTRINSIC]]
// expected-warning@+1 {{implicit declaration of function 'svdup_lane_bf16'}}
return SVE_ACLE_FUNC(svdup_lane,_bf16,,)(data, index);
}
2 changes: 1 addition & 1 deletion clang/test/SemaOpenCL/block-array-capturing.cl
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
// RUN: %clang_cc1 -O0 -cl-std=CL2.0 -triple spir64-unkown-unkown -emit-llvm %s -o -| FileCheck %s
// RUN: %clang_cc1 -O0 -cl-std=CL2.0 -triple spir64-unknown-unknown -emit-llvm %s -o -| FileCheck %s
// expected-no-diagnostics

typedef int (^block_t)();
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5 changes: 5 additions & 0 deletions clang/utils/TableGen/SveEmitter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1262,6 +1262,11 @@ void SVEEmitter::createHeader(raw_ostream &OS) {
if (!InGuard.empty())
OS << "#endif //" << InGuard << "\n";

OS << "#if defined(__ARM_FEATURE_SVE_BF16)\n";
OS << "#define svcvtnt_bf16_x svcvtnt_bf16_m\n";
OS << "#define svcvtnt_bf16_f32_x svcvtnt_bf16_f32_m\n";
OS << "#endif /*__ARM_FEATURE_SVE_BF16 */\n\n";

OS << "#if defined(__ARM_FEATURE_SVE2)\n";
OS << "#define svcvtnt_f16_x svcvtnt_f16_m\n";
OS << "#define svcvtnt_f16_f32_x svcvtnt_f16_f32_m\n";
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Original file line number Diff line number Diff line change
Expand Up @@ -200,6 +200,9 @@ class ClangDiagnosticManagerAdapter : public clang::DiagnosticConsumer {
return;
}

// Update error/warning counters.
DiagnosticConsumer::HandleDiagnostic(DiagLevel, Info);

// Render diagnostic message to m_output.
m_output.clear();
m_passthrough->HandleDiagnostic(DiagLevel, Info);
Expand Down Expand Up @@ -261,7 +264,11 @@ class ClangDiagnosticManagerAdapter : public clang::DiagnosticConsumer {
}
}

clang::TextDiagnosticPrinter *GetPassthrough() { return m_passthrough.get(); }
void BeginSourceFile(const LangOptions &LO, const Preprocessor *PP) override {
m_passthrough->BeginSourceFile(LO, PP);
}

void EndSourceFile() override { m_passthrough->EndSourceFile(); }

private:
DiagnosticManager *m_manager = nullptr;
Expand Down Expand Up @@ -967,7 +974,6 @@ ClangExpressionParser::ParseInternal(DiagnosticManager &diagnostic_manager,
ClangDiagnosticManagerAdapter *adapter =
static_cast<ClangDiagnosticManagerAdapter *>(
m_compiler->getDiagnostics().getClient());
auto diag_buf = adapter->GetPassthrough();

adapter->ResetManager(&diagnostic_manager);

Expand Down Expand Up @@ -1022,8 +1028,8 @@ ClangExpressionParser::ParseInternal(DiagnosticManager &diagnostic_manager,
source_mgr.setMainFileID(source_mgr.createFileID(std::move(memory_buffer)));
}

diag_buf->BeginSourceFile(m_compiler->getLangOpts(),
&m_compiler->getPreprocessor());
adapter->BeginSourceFile(m_compiler->getLangOpts(),
&m_compiler->getPreprocessor());

ClangExpressionHelper *type_system_helper =
dyn_cast<ClangExpressionHelper>(m_expr.GetTypeSystemHelper());
Expand Down Expand Up @@ -1108,9 +1114,9 @@ ClangExpressionParser::ParseInternal(DiagnosticManager &diagnostic_manager,
// original behavior of ParseAST (which also destroys the Sema after parsing).
m_compiler->setSema(nullptr);

diag_buf->EndSourceFile();
adapter->EndSourceFile();

unsigned num_errors = diag_buf->getNumErrors();
unsigned num_errors = adapter->getNumErrors();

if (m_pp_callbacks && m_pp_callbacks->hasErrors()) {
num_errors++;
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2387,7 +2387,7 @@ bool IRTranslator::runOnMachineFunction(MachineFunction &CurMF) {
// Lower the actual args into this basic block.
SmallVector<ArrayRef<Register>, 8> VRegArgs;
for (const Argument &Arg: F.args()) {
if (DL->getTypeStoreSize(Arg.getType()) == 0)
if (DL->getTypeStoreSize(Arg.getType()).isZero())
continue; // Don't handle zero sized types.
ArrayRef<Register> VRegs = getOrCreateVRegs(Arg);
VRegArgs.push_back(VRegs);
Expand Down
16 changes: 8 additions & 8 deletions llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -19218,13 +19218,13 @@ SDValue DAGCombiner::visitEXTRACT_SUBVECTOR(SDNode *N) {
V.getOperand(0).getValueType().isVector()) {
SDValue SrcOp = V.getOperand(0);
EVT SrcVT = SrcOp.getValueType();
unsigned SrcNumElts = SrcVT.getVectorNumElements();
unsigned DestNumElts = V.getValueType().getVectorNumElements();
unsigned SrcNumElts = SrcVT.getVectorMinNumElements();
unsigned DestNumElts = V.getValueType().getVectorMinNumElements();
if ((SrcNumElts % DestNumElts) == 0) {
unsigned SrcDestRatio = SrcNumElts / DestNumElts;
unsigned NewExtNumElts = NVT.getVectorNumElements() * SrcDestRatio;
ElementCount NewExtEC = NVT.getVectorElementCount() * SrcDestRatio;
EVT NewExtVT = EVT::getVectorVT(*DAG.getContext(), SrcVT.getScalarType(),
NewExtNumElts);
NewExtEC);
if (TLI.isOperationLegalOrCustom(ISD::EXTRACT_SUBVECTOR, NewExtVT)) {
SDLoc DL(N);
SDValue NewIndex = DAG.getVectorIdxConstant(ExtIdx * SrcDestRatio, DL);
Expand All @@ -19235,22 +19235,22 @@ SDValue DAGCombiner::visitEXTRACT_SUBVECTOR(SDNode *N) {
}
if ((DestNumElts % SrcNumElts) == 0) {
unsigned DestSrcRatio = DestNumElts / SrcNumElts;
if ((NVT.getVectorNumElements() % DestSrcRatio) == 0) {
unsigned NewExtNumElts = NVT.getVectorNumElements() / DestSrcRatio;
if ((NVT.getVectorMinNumElements() % DestSrcRatio) == 0) {
ElementCount NewExtEC = NVT.getVectorElementCount() / DestSrcRatio;
EVT ScalarVT = SrcVT.getScalarType();
if ((ExtIdx % DestSrcRatio) == 0) {
SDLoc DL(N);
unsigned IndexValScaled = ExtIdx / DestSrcRatio;
EVT NewExtVT =
EVT::getVectorVT(*DAG.getContext(), ScalarVT, NewExtNumElts);
EVT::getVectorVT(*DAG.getContext(), ScalarVT, NewExtEC);
if (TLI.isOperationLegalOrCustom(ISD::EXTRACT_SUBVECTOR, NewExtVT)) {
SDValue NewIndex = DAG.getVectorIdxConstant(IndexValScaled, DL);
SDValue NewExtract =
DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, NewExtVT,
V.getOperand(0), NewIndex);
return DAG.getBitcast(NVT, NewExtract);
}
if (NewExtNumElts == 1 &&
if (NewExtEC == 1 &&
TLI.isOperationLegalOrCustom(ISD::EXTRACT_VECTOR_ELT, ScalarVT)) {
SDValue NewIndex = DAG.getVectorIdxConstant(IndexValScaled, DL);
SDValue NewExtract =
Expand Down
17 changes: 12 additions & 5 deletions llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -745,12 +745,16 @@ static void getCopyToPartsVector(SelectionDAG &DAG, const SDLoc &DL,
NumParts = NumRegs; // Silence a compiler warning.
assert(RegisterVT == PartVT && "Part type doesn't match vector breakdown!");

unsigned IntermediateNumElts = IntermediateVT.isVector() ?
IntermediateVT.getVectorNumElements() : 1;
assert(IntermediateVT.isScalableVector() == ValueVT.isScalableVector() &&
"Mixing scalable and fixed vectors when copying in parts");

ElementCount DestEltCnt;

if (IntermediateVT.isVector())
DestEltCnt = IntermediateVT.getVectorElementCount() * NumIntermediates;
else
DestEltCnt = ElementCount(NumIntermediates, false);

// Convert the vector to the appropriate type if necessary.
auto DestEltCnt = ElementCount(NumIntermediates * IntermediateNumElts,
ValueVT.isScalableVector());
EVT BuiltVectorTy = EVT::getVectorVT(
*DAG.getContext(), IntermediateVT.getScalarType(), DestEltCnt);
if (ValueVT != BuiltVectorTy) {
Expand All @@ -764,6 +768,9 @@ static void getCopyToPartsVector(SelectionDAG &DAG, const SDLoc &DL,
SmallVector<SDValue, 8> Ops(NumIntermediates);
for (unsigned i = 0; i != NumIntermediates; ++i) {
if (IntermediateVT.isVector()) {
// This does something sensible for scalable vectors - see the
// definition of EXTRACT_SUBVECTOR for further details.
unsigned IntermediateNumElts = IntermediateVT.getVectorMinNumElements();
Ops[i] =
DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, IntermediateVT, Val,
DAG.getVectorIdxConstant(i * IntermediateNumElts, DL));
Expand Down
5 changes: 5 additions & 0 deletions llvm/lib/Support/Windows/Path.inc
Original file line number Diff line number Diff line change
Expand Up @@ -555,6 +555,11 @@ std::error_code rename(const Twine &From, const Twine &To) {
NULL, OPEN_EXISTING, FILE_ATTRIBUTE_NORMAL, NULL);
if (FromHandle)
break;

// We don't want to loop if the file doesn't exist.
auto EC = mapWindowsError(GetLastError());
if (EC == errc::no_such_file_or_directory)
return EC;
}
if (!FromHandle)
return mapWindowsError(GetLastError());
Expand Down
3 changes: 0 additions & 3 deletions llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -13853,9 +13853,6 @@ SDValue AArch64TargetLowering::PerformDAGCombine(SDNode *N,
SDValue Idx = N->getOperand(3);

uint64_t IdxConst = cast<ConstantSDNode>(Idx)->getZExtValue();
if (IdxConst > Src1->getNumOperands() - 1)
report_fatal_error("index larger than expected");

EVT ResVT = N->getValueType(0);
uint64_t NumLanes = ResVT.getVectorElementCount().Min;
SDValue Val =
Expand Down
2 changes: 2 additions & 0 deletions llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
Original file line number Diff line number Diff line change
Expand Up @@ -1711,6 +1711,7 @@ multiclass sve_prefetch<SDPatternOperator prefetch, ValueType PredTy, Instructio
defm : unpred_store<truncstorevi32, nxv2i64, ST1W_D_IMM, PTRUE_D>;
defm : unpred_store< store, nxv2i64, ST1D_IMM, PTRUE_D>;
defm : unpred_store< store, nxv8f16, ST1H_IMM, PTRUE_H>;
defm : unpred_store< store, nxv8bf16, ST1H_IMM, PTRUE_H>;
defm : unpred_store< store, nxv4f16, ST1H_S_IMM, PTRUE_S>;
defm : unpred_store< store, nxv2f16, ST1H_D_IMM, PTRUE_D>;
defm : unpred_store< store, nxv4f32, ST1W_IMM, PTRUE_S>;
Expand Down Expand Up @@ -1756,6 +1757,7 @@ multiclass sve_prefetch<SDPatternOperator prefetch, ValueType PredTy, Instructio
defm : unpred_load<sextloadvi32, nxv2i64, LD1SW_D_IMM, PTRUE_D>;
defm : unpred_load< load, nxv2i64, LD1D_IMM, PTRUE_D>;
defm : unpred_load< load, nxv8f16, LD1H_IMM, PTRUE_H>;
defm : unpred_load< load, nxv8bf16, LD1H_IMM, PTRUE_H>;
defm : unpred_load< load, nxv4f16, LD1H_S_IMM, PTRUE_S>;
defm : unpred_load< load, nxv2f16, LD1H_D_IMM, PTRUE_D>;
defm : unpred_load< load, nxv4f32, LD1W_IMM, PTRUE_S>;
Expand Down
7 changes: 5 additions & 2 deletions llvm/lib/Target/ARM/ARMTargetMachine.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -518,9 +518,12 @@ void ARMPassConfig::addPreSched2() {
addPass(createARMExpandPseudoPass());

if (getOptLevel() != CodeGenOpt::None) {
// in v8, IfConversion depends on Thumb instruction widths
// When optimising for size, always run the Thumb2SizeReduction pass before
// IfConversion. Otherwise, check whether IT blocks are restricted
// (e.g. in v8, IfConversion depends on Thumb instruction widths)
addPass(createThumb2SizeReductionPass([this](const Function &F) {
return this->TM->getSubtarget<ARMSubtarget>(F).restrictIT();
return this->TM->getSubtarget<ARMSubtarget>(F).hasMinSize() ||
this->TM->getSubtarget<ARMSubtarget>(F).restrictIT();
}));

addPass(createIfConverter([](const MachineFunction &MF) {
Expand Down
41 changes: 20 additions & 21 deletions llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -210,18 +210,16 @@ static bool hasAnalyzableMemoryWrite(Instruction *I,
}
}
if (auto *CB = dyn_cast<CallBase>(I)) {
if (Function *F = CB->getCalledFunction()) {
LibFunc LF;
if (TLI.getLibFunc(*F, LF) && TLI.has(LF)) {
switch (LF) {
case LibFunc_strcpy:
case LibFunc_strncpy:
case LibFunc_strcat:
case LibFunc_strncat:
return true;
default:
return false;
}
LibFunc LF;
if (TLI.getLibFunc(*CB, LF) && TLI.has(LF)) {
switch (LF) {
case LibFunc_strcpy:
case LibFunc_strncpy:
case LibFunc_strcat:
case LibFunc_strncat:
return true;
default:
return false;
}
}
}
Expand Down Expand Up @@ -1581,16 +1579,17 @@ struct DSEState {
return {MemoryLocation::getForDest(MTI)};

if (auto *CB = dyn_cast<CallBase>(I)) {
if (Function *F = CB->getCalledFunction()) {
StringRef FnName = F->getName();
if (TLI.has(LibFunc_strcpy) && FnName == TLI.getName(LibFunc_strcpy))
return {MemoryLocation(CB->getArgOperand(0))};
if (TLI.has(LibFunc_strncpy) && FnName == TLI.getName(LibFunc_strncpy))
return {MemoryLocation(CB->getArgOperand(0))};
if (TLI.has(LibFunc_strcat) && FnName == TLI.getName(LibFunc_strcat))
return {MemoryLocation(CB->getArgOperand(0))};
if (TLI.has(LibFunc_strncat) && FnName == TLI.getName(LibFunc_strncat))
LibFunc LF;
if (TLI.getLibFunc(*CB, LF) && TLI.has(LF)) {
switch (LF) {
case LibFunc_strcpy:
case LibFunc_strncpy:
case LibFunc_strcat:
case LibFunc_strncat:
return {MemoryLocation(CB->getArgOperand(0))};
default:
break;
}
}
return None;
}
Expand Down
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