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Merged master:82dc32e2d45 into amd-gfx:f8723175451
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Local branch amd-gfx f872317 Merged master:c502bae5241 into amd-gfx:e40ee12b6f1
Remote branch master 82dc32e Big-endian fix to DWARFDieTest (089c0f5)
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Sw authored and Sw committed Nov 20, 2019
2 parents f872317 + 82dc32e commit 776f23f
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Showing 78 changed files with 2,545 additions and 2,030 deletions.
14 changes: 14 additions & 0 deletions clang-tools-extra/clangd/Selection.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -12,6 +12,7 @@
#include "clang/AST/ASTTypeTraits.h"
#include "clang/AST/DeclCXX.h"
#include "clang/AST/Expr.h"
#include "clang/AST/ExprCXX.h"
#include "clang/AST/PrettyPrinter.h"
#include "clang/AST/RecursiveASTVisitor.h"
#include "clang/AST/TypeLoc.h"
Expand Down Expand Up @@ -245,6 +246,10 @@ class SelectionVisitor : public RecursiveASTVisitor<SelectionVisitor> {
if (canSafelySkipNode(N))
return false;
push(std::move(N));
if (shouldSkipChildren(X)) {
pop();
return false;
}
return true;
}
bool dataTraverseStmtPost(Stmt *X) {
Expand Down Expand Up @@ -355,6 +360,15 @@ class SelectionVisitor : public RecursiveASTVisitor<SelectionVisitor> {
return true;
}

// There are certain nodes we want to treat as leaves in the SelectionTree,
// although they do have children.
bool shouldSkipChildren(const Stmt *X) const {
// UserDefinedLiteral (e.g. 12_i) has two children (12 and _i).
// Unfortunately TokenBuffer sees 12_i as one token and can't split it.
// So we treat UserDefinedLiteral as a leaf node, owning the token.
return llvm::isa<UserDefinedLiteral>(X);
}

// Pushes a node onto the ancestor stack. Pairs with pop().
// Performs early hit detection for some nodes (on the earlySourceRange).
void push(DynTypedNode Node) {
Expand Down
10 changes: 10 additions & 0 deletions clang-tools-extra/clangd/unittests/SelectionTests.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -304,6 +304,16 @@ TEST(SelectionTest, CommonAncestor) {
}
)cpp",
"CallExpr"},

// User-defined literals are tricky: is 12_i one token or two?
// For now we treat it as one, and the UserDefinedLiteral as a leaf.
{
R"cpp(
struct Foo{};
Foo operator""_ud(unsigned long long);
Foo x = [[^12_ud]];
)cpp",
"UserDefinedLiteral"},
};
for (const Case &C : Cases) {
Annotations Test(C.Code);
Expand Down
162 changes: 83 additions & 79 deletions clang/include/clang/Basic/arm_fp16.td
Original file line number Diff line number Diff line change
Expand Up @@ -17,114 +17,118 @@ include "arm_neon_incl.td"
let ArchGuard = "defined(__ARM_FEATURE_FP16_SCALAR_ARITHMETIC) && defined(__aarch64__)" in {

// Negate
def VNEGSH : SInst<"vneg", "ss", "Sh">;
def VNEGSH : SInst<"vneg", "11", "Sh">;

// Reciprocal/Sqrt
def SCALAR_FRECPSH : IInst<"vrecps", "sss", "Sh">;
def FSQRTSH : SInst<"vsqrt", "ss", "Sh">;
def SCALAR_FRSQRTSH : IInst<"vrsqrts", "sss", "Sh">;
def SCALAR_FRECPSH : IInst<"vrecps", "111", "Sh">;
def FSQRTSH : SInst<"vsqrt", "11", "Sh">;
def SCALAR_FRSQRTSH : IInst<"vrsqrts", "111", "Sh">;

// Reciprocal Estimate
def SCALAR_FRECPEH : IInst<"vrecpe", "ss", "Sh">;
def SCALAR_FRECPEH : IInst<"vrecpe", "11", "Sh">;

// Reciprocal Exponent
def SCALAR_FRECPXH : IInst<"vrecpx", "ss", "Sh">;
def SCALAR_FRECPXH : IInst<"vrecpx", "11", "Sh">;

// Reciprocal Square Root Estimate
def SCALAR_FRSQRTEH : IInst<"vrsqrte", "ss", "Sh">;
def SCALAR_FRSQRTEH : IInst<"vrsqrte", "11", "Sh">;

// Rounding
def FRINTZ_S64H : SInst<"vrnd", "ss", "Sh">;
def FRINTA_S64H : SInst<"vrnda", "ss", "Sh">;
def FRINTI_S64H : SInst<"vrndi", "ss", "Sh">;
def FRINTM_S64H : SInst<"vrndm", "ss", "Sh">;
def FRINTN_S64H : SInst<"vrndn", "ss", "Sh">;
def FRINTP_S64H : SInst<"vrndp", "ss", "Sh">;
def FRINTX_S64H : SInst<"vrndx", "ss", "Sh">;
def FRINTZ_S64H : SInst<"vrnd", "11", "Sh">;
def FRINTA_S64H : SInst<"vrnda", "11", "Sh">;
def FRINTI_S64H : SInst<"vrndi", "11", "Sh">;
def FRINTM_S64H : SInst<"vrndm", "11", "Sh">;
def FRINTN_S64H : SInst<"vrndn", "11", "Sh">;
def FRINTP_S64H : SInst<"vrndp", "11", "Sh">;
def FRINTX_S64H : SInst<"vrndx", "11", "Sh">;

// Conversion
def SCALAR_SCVTFSH : SInst<"vcvth_f16", "Ys", "silUsUiUl">;
def SCALAR_FCVTZSH : SInst<"vcvt_s16", "$s", "Sh">;
def SCALAR_FCVTZSH1 : SInst<"vcvt_s32", "Is", "Sh">;
def SCALAR_FCVTZSH2 : SInst<"vcvt_s64", "Ls", "Sh">;
def SCALAR_FCVTZUH : SInst<"vcvt_u16", "bs", "Sh">;
def SCALAR_FCVTZUH1 : SInst<"vcvt_u32", "Us", "Sh">;
def SCALAR_FCVTZUH2 : SInst<"vcvt_u64", "Os", "Sh">;
def SCALAR_FCVTASH : SInst<"vcvta_s16", "$s", "Sh">;
def SCALAR_FCVTASH1 : SInst<"vcvta_s32", "Is", "Sh">;
def SCALAR_FCVTASH2 : SInst<"vcvta_s64", "Ls", "Sh">;
def SCALAR_FCVTAUH : SInst<"vcvta_u16", "bs", "Sh">;
def SCALAR_FCVTAUH1 : SInst<"vcvta_u32", "Us", "Sh">;
def SCALAR_FCVTAUH2 : SInst<"vcvta_u64", "Os", "Sh">;
def SCALAR_FCVTMSH : SInst<"vcvtm_s16", "$s", "Sh">;
def SCALAR_FCVTMSH1 : SInst<"vcvtm_s32", "Is", "Sh">;
def SCALAR_FCVTMSH2 : SInst<"vcvtm_s64", "Ls", "Sh">;
def SCALAR_FCVTMUH : SInst<"vcvtm_u16", "bs", "Sh">;
def SCALAR_FCVTMUH1 : SInst<"vcvtm_u32", "Us", "Sh">;
def SCALAR_FCVTMUH2 : SInst<"vcvtm_u64", "Os", "Sh">;
def SCALAR_FCVTNSH : SInst<"vcvtn_s16", "$s", "Sh">;
def SCALAR_FCVTNSH1 : SInst<"vcvtn_s32", "Is", "Sh">;
def SCALAR_FCVTNSH2 : SInst<"vcvtn_s64", "Ls", "Sh">;
def SCALAR_FCVTNUH : SInst<"vcvtn_u16", "bs", "Sh">;
def SCALAR_FCVTNUH1 : SInst<"vcvtn_u32", "Us", "Sh">;
def SCALAR_FCVTNUH2 : SInst<"vcvtn_u64", "Os", "Sh">;
def SCALAR_FCVTPSH : SInst<"vcvtp_s16", "$s", "Sh">;
def SCALAR_FCVTPSH1 : SInst<"vcvtp_s32", "Is", "Sh">;
def SCALAR_FCVTPSH2 : SInst<"vcvtp_s64", "Ls", "Sh">;
def SCALAR_FCVTPUH : SInst<"vcvtp_u16", "bs", "Sh">;
def SCALAR_FCVTPUH1 : SInst<"vcvtp_u32", "Us", "Sh">;
def SCALAR_FCVTPUH2 : SInst<"vcvtp_u64", "Os", "Sh">;
def SCALAR_SCVTFSH : SInst<"vcvth_f16", "(1F)(1!)", "sUs">;
def SCALAR_SCVTFSH1 : SInst<"vcvth_f16", "(1F<)(1!)", "iUi">;
def SCALAR_SCVTFSH2 : SInst<"vcvth_f16", "(1F<<)(1!)", "lUl">;
def SCALAR_FCVTZSH : SInst<"vcvt_s16", "(1S)1", "Sh">;
def SCALAR_FCVTZSH1 : SInst<"vcvt_s32", "(1S>)1", "Sh">;
def SCALAR_FCVTZSH2 : SInst<"vcvt_s64", "(1S>>)1", "Sh">;
def SCALAR_FCVTZUH : SInst<"vcvt_u16", "(1U)1", "Sh">;
def SCALAR_FCVTZUH1 : SInst<"vcvt_u32", "(1U>)1", "Sh">;
def SCALAR_FCVTZUH2 : SInst<"vcvt_u64", "(1U>>)1", "Sh">;
def SCALAR_FCVTASH : SInst<"vcvta_s16", "(1S)1", "Sh">;
def SCALAR_FCVTASH1 : SInst<"vcvta_s32", "(1S>)1", "Sh">;
def SCALAR_FCVTASH2 : SInst<"vcvta_s64", "(1S>>)1", "Sh">;
def SCALAR_FCVTAUH : SInst<"vcvta_u16", "(1U)1", "Sh">;
def SCALAR_FCVTAUH1 : SInst<"vcvta_u32", "(1U>)1", "Sh">;
def SCALAR_FCVTAUH2 : SInst<"vcvta_u64", "(1U>>)1", "Sh">;
def SCALAR_FCVTMSH : SInst<"vcvtm_s16", "(1S)1", "Sh">;
def SCALAR_FCVTMSH1 : SInst<"vcvtm_s32", "(1S>)1", "Sh">;
def SCALAR_FCVTMSH2 : SInst<"vcvtm_s64", "(1S>>)1", "Sh">;
def SCALAR_FCVTMUH : SInst<"vcvtm_u16", "(1U)1", "Sh">;
def SCALAR_FCVTMUH1 : SInst<"vcvtm_u32", "(1U>)1", "Sh">;
def SCALAR_FCVTMUH2 : SInst<"vcvtm_u64", "(1U>>)1", "Sh">;
def SCALAR_FCVTNSH : SInst<"vcvtn_s16", "(1S)1", "Sh">;
def SCALAR_FCVTNSH1 : SInst<"vcvtn_s32", "(1S>)1", "Sh">;
def SCALAR_FCVTNSH2 : SInst<"vcvtn_s64", "(1S>>)1", "Sh">;
def SCALAR_FCVTNUH : SInst<"vcvtn_u16", "(1U)1", "Sh">;
def SCALAR_FCVTNUH1 : SInst<"vcvtn_u32", "(1U>)1", "Sh">;
def SCALAR_FCVTNUH2 : SInst<"vcvtn_u64", "(1U>>)1", "Sh">;
def SCALAR_FCVTPSH : SInst<"vcvtp_s16", "(1S)1", "Sh">;
def SCALAR_FCVTPSH1 : SInst<"vcvtp_s32", "(1S>)1", "Sh">;
def SCALAR_FCVTPSH2 : SInst<"vcvtp_s64", "(1S>>)1", "Sh">;
def SCALAR_FCVTPUH : SInst<"vcvtp_u16", "(1U)1", "Sh">;
def SCALAR_FCVTPUH1 : SInst<"vcvtp_u32", "(1U>)1", "Sh">;
def SCALAR_FCVTPUH2 : SInst<"vcvtp_u64", "(1U>>)1", "Sh">;
let isVCVT_N = 1 in {
def SCALAR_SCVTFSHO : SInst<"vcvth_n_f16", "Ysi", "silUsUiUl">;
def SCALAR_FCVTZSHO : SInst<"vcvt_n_s16", "$si", "Sh">;
def SCALAR_FCVTZSH1O: SInst<"vcvt_n_s32", "Isi", "Sh">;
def SCALAR_FCVTZSH2O: SInst<"vcvt_n_s64", "Lsi", "Sh">;
def SCALAR_FCVTZUHO : SInst<"vcvt_n_u16", "bsi", "Sh">;
def SCALAR_FCVTZUH1O: SInst<"vcvt_n_u32", "Usi", "Sh">;
def SCALAR_FCVTZUH2O: SInst<"vcvt_n_u64", "Osi", "Sh">;
def SCALAR_SCVTFSHO : SInst<"vcvth_n_f16", "(1F)(1!)I", "sUs">;
def SCALAR_SCVTFSH1O: SInst<"vcvth_n_f16", "(1F<)(1!)I", "iUi">;
def SCALAR_SCVTFSH2O: SInst<"vcvth_n_f16", "(1F<<)(1!)I", "lUl">;
def SCALAR_FCVTZSHO : SInst<"vcvt_n_s16", "(1S)1I", "Sh">;
def SCALAR_FCVTZSH1O: SInst<"vcvt_n_s32", "(1S>)1I", "Sh">;
def SCALAR_FCVTZSH2O: SInst<"vcvt_n_s64", "(1S>>)1I", "Sh">;
def SCALAR_FCVTZUHO : SInst<"vcvt_n_u16", "(1U)1I", "Sh">;
def SCALAR_FCVTZUH1O: SInst<"vcvt_n_u32", "(1U>)1I", "Sh">;
def SCALAR_FCVTZUH2O: SInst<"vcvt_n_u64", "(1U>>)1I", "Sh">;
}
// Comparison
def SCALAR_CMEQRH : SInst<"vceq", "bss", "Sh">;
def SCALAR_CMEQZH : SInst<"vceqz", "bs", "Sh">;
def SCALAR_CMGERH : SInst<"vcge", "bss", "Sh">;
def SCALAR_CMGEZH : SInst<"vcgez", "bs", "Sh">;
def SCALAR_CMGTRH : SInst<"vcgt", "bss", "Sh">;
def SCALAR_CMGTZH : SInst<"vcgtz", "bs", "Sh">;
def SCALAR_CMLERH : SInst<"vcle", "bss", "Sh">;
def SCALAR_CMLEZH : SInst<"vclez", "bs", "Sh">;
def SCALAR_CMLTH : SInst<"vclt", "bss", "Sh">;
def SCALAR_CMLTZH : SInst<"vcltz", "bs", "Sh">;
def SCALAR_CMEQRH : SInst<"vceq", "(1U)11", "Sh">;
def SCALAR_CMEQZH : SInst<"vceqz", "(1U)1", "Sh">;
def SCALAR_CMGERH : SInst<"vcge", "(1U)11", "Sh">;
def SCALAR_CMGEZH : SInst<"vcgez", "(1U)1", "Sh">;
def SCALAR_CMGTRH : SInst<"vcgt", "(1U)11", "Sh">;
def SCALAR_CMGTZH : SInst<"vcgtz", "(1U)1", "Sh">;
def SCALAR_CMLERH : SInst<"vcle", "(1U)11", "Sh">;
def SCALAR_CMLEZH : SInst<"vclez", "(1U)1", "Sh">;
def SCALAR_CMLTH : SInst<"vclt", "(1U)11", "Sh">;
def SCALAR_CMLTZH : SInst<"vcltz", "(1U)1", "Sh">;

// Absolute Compare Mask Greater Than Or Equal
def SCALAR_FACGEH : IInst<"vcage", "bss", "Sh">;
def SCALAR_FACLEH : IInst<"vcale", "bss", "Sh">;
def SCALAR_FACGEH : IInst<"vcage", "(1U)11", "Sh">;
def SCALAR_FACLEH : IInst<"vcale", "(1U)11", "Sh">;

// Absolute Compare Mask Greater Than
def SCALAR_FACGT : IInst<"vcagt", "bss", "Sh">;
def SCALAR_FACLT : IInst<"vcalt", "bss", "Sh">;
def SCALAR_FACGT : IInst<"vcagt", "(1U)11", "Sh">;
def SCALAR_FACLT : IInst<"vcalt", "(1U)11", "Sh">;

// Scalar Absolute Value
def SCALAR_ABSH : SInst<"vabs", "ss", "Sh">;
def SCALAR_ABSH : SInst<"vabs", "11", "Sh">;

// Scalar Absolute Difference
def SCALAR_ABDH: IInst<"vabd", "sss", "Sh">;
def SCALAR_ABDH: IInst<"vabd", "111", "Sh">;

// Add/Sub
def VADDSH : SInst<"vadd", "sss", "Sh">;
def VSUBHS : SInst<"vsub", "sss", "Sh">;
def VADDSH : SInst<"vadd", "111", "Sh">;
def VSUBHS : SInst<"vsub", "111", "Sh">;

// Max/Min
def VMAXHS : SInst<"vmax", "sss", "Sh">;
def VMINHS : SInst<"vmin", "sss", "Sh">;
def FMAXNMHS : SInst<"vmaxnm", "sss", "Sh">;
def FMINNMHS : SInst<"vminnm", "sss", "Sh">;
def VMAXHS : SInst<"vmax", "111", "Sh">;
def VMINHS : SInst<"vmin", "111", "Sh">;
def FMAXNMHS : SInst<"vmaxnm", "111", "Sh">;
def FMINNMHS : SInst<"vminnm", "111", "Sh">;

// Multiplication/Division
def VMULHS : SInst<"vmul", "sss", "Sh">;
def MULXHS : SInst<"vmulx", "sss", "Sh">;
def FDIVHS : SInst<"vdiv", "sss", "Sh">;
def VMULHS : SInst<"vmul", "111", "Sh">;
def MULXHS : SInst<"vmulx", "111", "Sh">;
def FDIVHS : SInst<"vdiv", "111", "Sh">;

// Vector fused multiply-add operations
def VFMAHS : SInst<"vfma", "ssss", "Sh">;
def VFMSHS : SInst<"vfms", "ssss", "Sh">;
def VFMAHS : SInst<"vfma", "1111", "Sh">;
def VFMSHS : SInst<"vfms", "1111", "Sh">;
}
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