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Merged
merged 2 commits into from
Sep 12, 2025
Merged

Adding C0/C6 state metrics to EMR #335

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8a24552
Adding C0/C6 state metrics.
1perrytaylor Sep 12, 2025
29c3a94
Adding SPR
1perrytaylor Sep 12, 2025
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58 changes: 56 additions & 2 deletions EMR/metrics/emeraldrapids_metrics.json
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Expand Up @@ -2,8 +2,8 @@
"Header": {
"Copyright": "Copyright (c) 2001 - 2025 Intel Corporation. All rights reserved.",
"Info": "Performance Monitoring Metrics for 5th Generation Intel(R) Xeon(R) Processor Scalable Family0",
"DatePublished": "06/17/2025",
"Version": "1.1",
"DatePublished": "09/12/2025",
"Version": "1.2",
"Legend": "",
"TmaVersion": "5.1",
"TmaFlavor": "Full"
Expand Down Expand Up @@ -1093,6 +1093,60 @@
"ResolutionLevels": "CHA, SOCKET, SYSTEM",
"MetricGroup": ""
},
{
"MetricName": "cpu_cstate_c0",
"LegacyName": "metric_CPU_cstate_C0",
"Level": 1,
"BriefDescription": "The average number of cores that are in cstate C0 as observed by the power control unit (PCU).",
"UnitOfMeasure": "",
"Events": [
{
"Name": "UNC_P_CLOCKTICKS",
"Alias": "a"
},
{
"Name": "UNC_P_POWER_STATE_OCCUPANCY_CORES_C0",
"Alias": "b"
}
],
"Constants": [
{
"Name": "SOCKET_COUNT",
"Alias": "socket_count"
}
],
"Formula": "(b / a[0]) * socket_count",
"Category": "Power",
"ResolutionLevels": "SOCKET, SYSTEM",
"MetricGroup": "cpu_cstate"
},
{
"MetricName": "cpu_cstate_c6",
"LegacyName": "metric_CPU_cstate_C6",
"Level": 1,
"BriefDescription": "The average number of cores are in cstate C6 as observed by the power control unit (PCU).",
"UnitOfMeasure": "",
"Events": [
{
"Name": "UNC_P_CLOCKTICKS",
"Alias": "a"
},
{
"Name": "UNC_P_POWER_STATE_OCCUPANCY_CORES_C6",
"Alias": "b"
}
],
"Constants": [
{
"Name": "SOCKET_COUNT",
"Alias": "socket_count"
}
],
"Formula": "(b / a[0]) * socket_count",
"Category": "Power",
"ResolutionLevels": "SOCKET, SYSTEM",
"MetricGroup": "cpu_cstate"
},
{
"MetricName": "Bottleneck_Mispredictions",
"LegacyName": "metric_TMA_Bottleneck_Mispredictions",
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12 changes: 12 additions & 0 deletions EMR/metrics/perf/emeraldrapids_metrics_perf.json
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Expand Up @@ -318,5 +318,17 @@
"MetricGroup": "",
"MetricName": "io_bandwidth_write_l3_miss",
"ScaleUnit": "1MB/s"
},
{
"BriefDescription": "The average number of cores that are in cstate C0 as observed by the power control unit (PCU)",
"MetricExpr": "( UNC_P_POWER_STATE_OCCUPANCY_CORES_C0 / pcu_0@UNC_P_CLOCKTICKS@ ) * #num_packages",
"MetricGroup": "cpu_cstate",
"MetricName": "cpu_cstate_c0"
},
{
"BriefDescription": "The average number of cores are in cstate C6 as observed by the power control unit (PCU)",
"MetricExpr": "( UNC_P_POWER_STATE_OCCUPANCY_CORES_C6 / pcu_0@UNC_P_CLOCKTICKS@ ) * #num_packages",
"MetricGroup": "cpu_cstate",
"MetricName": "cpu_cstate_c6"
}
]
12 changes: 12 additions & 0 deletions SPR/metrics/perf/sapphirerapids_metrics_perf.json
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Expand Up @@ -395,5 +395,17 @@
"MetricGroup": "",
"MetricName": "io_bandwidth_write_l3_miss",
"ScaleUnit": "1MB/s"
},
{
"BriefDescription": "The average number of cores that are in cstate C0 as observed by the power control unit (PCU)",
"MetricExpr": "( UNC_P_POWER_STATE_OCCUPANCY_CORES_C0 / pcu_0@UNC_P_CLOCKTICKS@ ) * #num_packages",
"MetricGroup": "cpu_cstate",
"MetricName": "cpu_cstate_c0"
},
{
"BriefDescription": "The average number of cores are in cstate C6 as observed by the power control unit (PCU)",
"MetricExpr": "( UNC_P_POWER_STATE_OCCUPANCY_CORES_C6 / pcu_0@UNC_P_CLOCKTICKS@ ) * #num_packages",
"MetricGroup": "cpu_cstate",
"MetricName": "cpu_cstate_c6"
}
]
12 changes: 12 additions & 0 deletions SPR/metrics/perf/sapphirerapidshbm_metrics_perf.json
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Expand Up @@ -395,5 +395,17 @@
"MetricGroup": "",
"MetricName": "io_bandwidth_write_l3_miss",
"ScaleUnit": "1MB/s"
},
{
"BriefDescription": "The average number of cores that are in cstate C0 as observed by the power control unit (PCU)",
"MetricExpr": "( UNC_P_POWER_STATE_OCCUPANCY_CORES_C0 / pcu_0@UNC_P_CLOCKTICKS@ ) * #num_packages",
"MetricGroup": "cpu_cstate",
"MetricName": "cpu_cstate_c0"
},
{
"BriefDescription": "The average number of cores are in cstate C6 as observed by the power control unit (PCU)",
"MetricExpr": "( UNC_P_POWER_STATE_OCCUPANCY_CORES_C6 / pcu_0@UNC_P_CLOCKTICKS@ ) * #num_packages",
"MetricGroup": "cpu_cstate",
"MetricName": "cpu_cstate_c6"
}
]
58 changes: 56 additions & 2 deletions SPR/metrics/sapphirerapids_metrics.json
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Expand Up @@ -2,8 +2,8 @@
"Header": {
"Copyright": "Copyright (c) 2001 - 2025 Intel Corporation. All rights reserved.",
"Info": "Performance Monitoring Metrics for 4th Generation Intel(R) Xeon(R) Processor Scalable Family based on Sapphire Rapids microarchitecture0",
"DatePublished": "06/17/2025",
"Version": "1.1",
"DatePublished": "09/12/2025",
"Version": "1.2",
"Legend": "",
"TmaVersion": "5.1",
"TmaFlavor": "Full"
Expand Down Expand Up @@ -1312,6 +1312,60 @@
"ResolutionLevels": "CHA, SOCKET, SYSTEM",
"MetricGroup": ""
},
{
"MetricName": "cpu_cstate_c0",
"LegacyName": "metric_CPU_cstate_C0",
"Level": 1,
"BriefDescription": "The average number of cores that are in cstate C0 as observed by the power control unit (PCU).",
"UnitOfMeasure": "",
"Events": [
{
"Name": "UNC_P_CLOCKTICKS",
"Alias": "a"
},
{
"Name": "UNC_P_POWER_STATE_OCCUPANCY_CORES_C0",
"Alias": "b"
}
],
"Constants": [
{
"Name": "SOCKET_COUNT",
"Alias": "socket_count"
}
],
"Formula": "(b / a[0]) * socket_count",
"Category": "Power",
"ResolutionLevels": "SOCKET, SYSTEM",
"MetricGroup": "cpu_cstate"
},
{
"MetricName": "cpu_cstate_c6",
"LegacyName": "metric_CPU_cstate_C6",
"Level": 1,
"BriefDescription": "The average number of cores are in cstate C6 as observed by the power control unit (PCU).",
"UnitOfMeasure": "",
"Events": [
{
"Name": "UNC_P_CLOCKTICKS",
"Alias": "a"
},
{
"Name": "UNC_P_POWER_STATE_OCCUPANCY_CORES_C6",
"Alias": "b"
}
],
"Constants": [
{
"Name": "SOCKET_COUNT",
"Alias": "socket_count"
}
],
"Formula": "(b / a[0]) * socket_count",
"Category": "Power",
"ResolutionLevels": "SOCKET, SYSTEM",
"MetricGroup": "cpu_cstate"
},
{
"MetricName": "Bottleneck_Mispredictions",
"LegacyName": "metric_TMA_Bottleneck_Mispredictions",
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58 changes: 56 additions & 2 deletions SPR/metrics/sapphirerapidshbm_metrics.json
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Expand Up @@ -2,8 +2,8 @@
"Header": {
"Copyright": "Copyright (c) 2001 - 2025 Intel Corporation. All rights reserved.",
"Info": "Performance Monitoring Metrics for 4th Generation Intel(R) Xeon(R) Processor Scalable Family based on Sapphire Rapids microarchitecture0",
"DatePublished": "06/17/2025",
"Version": "1.1",
"DatePublished": "09/12/2025",
"Version": "1.2",
"Legend": "",
"TmaVersion": "5.1",
"TmaFlavor": "Full"
Expand Down Expand Up @@ -1312,6 +1312,60 @@
"ResolutionLevels": "CHA, SOCKET, SYSTEM",
"MetricGroup": ""
},
{
"MetricName": "cpu_cstate_c0",
"LegacyName": "metric_CPU_cstate_C0",
"Level": 1,
"BriefDescription": "The average number of cores that are in cstate C0 as observed by the power control unit (PCU).",
"UnitOfMeasure": "",
"Events": [
{
"Name": "UNC_P_CLOCKTICKS",
"Alias": "a"
},
{
"Name": "UNC_P_POWER_STATE_OCCUPANCY_CORES_C0",
"Alias": "b"
}
],
"Constants": [
{
"Name": "SOCKET_COUNT",
"Alias": "socket_count"
}
],
"Formula": "(b / a[0]) * socket_count",
"Category": "Power",
"ResolutionLevels": "SOCKET, SYSTEM",
"MetricGroup": "cpu_cstate"
},
{
"MetricName": "cpu_cstate_c6",
"LegacyName": "metric_CPU_cstate_C6",
"Level": 1,
"BriefDescription": "The average number of cores are in cstate C6 as observed by the power control unit (PCU).",
"UnitOfMeasure": "",
"Events": [
{
"Name": "UNC_P_CLOCKTICKS",
"Alias": "a"
},
{
"Name": "UNC_P_POWER_STATE_OCCUPANCY_CORES_C6",
"Alias": "b"
}
],
"Constants": [
{
"Name": "SOCKET_COUNT",
"Alias": "socket_count"
}
],
"Formula": "(b / a[0]) * socket_count",
"Category": "Power",
"ResolutionLevels": "SOCKET, SYSTEM",
"MetricGroup": "cpu_cstate"
},
{
"MetricName": "Bottleneck_Mispredictions",
"LegacyName": "metric_TMA_Bottleneck_Mispredictions",
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4 changes: 2 additions & 2 deletions mapfile.csv
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Expand Up @@ -142,11 +142,11 @@ GenuineIntel-6-8D,V1.1,/TGL/metrics/tigerlake_metrics.json,metrics,,,
GenuineIntel-6-8F,V1.34,/SPR/events/sapphirerapids_core.json,core,,,
GenuineIntel-6-8F,V1.34,/SPR/events/sapphirerapids_uncore.json,uncore,,,
GenuineIntel-6-8F,V1.34,/SPR/events/sapphirerapids_uncore_experimental.json,uncore experimental,,,
GenuineIntel-6-8F,V1.1,/SPR/metrics/sapphirerapids_metrics.json,metrics,,,
GenuineIntel-6-8F,V1.2,/SPR/metrics/sapphirerapids_metrics.json,metrics,,,
GenuineIntel-6-CF,V1.19,/EMR/events/emeraldrapids_core.json,core,,,
GenuineIntel-6-CF,V1.19,/EMR/events/emeraldrapids_uncore.json,uncore,,,
GenuineIntel-6-CF,V1.19,/EMR/events/emeraldrapids_uncore_experimental.json,uncore experimental,,,
GenuineIntel-6-CF,V1.1,/EMR/metrics/emeraldrapids_metrics.json,metrics,,,
GenuineIntel-6-CF,V1.2,/EMR/metrics/emeraldrapids_metrics.json,metrics,,,
GenuineIntel-6-6A,V1.28,/ICX/events/icelakex_core.json,core,,,
GenuineIntel-6-6A,V1.28,/ICX/events/icelakex_uncore.json,uncore,,,
GenuineIntel-6-6A,V1.28,/ICX/events/icelakex_uncore_experimental.json,uncore experimental,,,
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