[SYCL][DOC] Add sycl_ext_intel_grf_size extension #9779
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This extension is used to specify the register mode on an Intel GPU. Currently we only support specific register mode values on specific GPUs.
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I am planning to implement this once the proposed version is approved, and will move it to experimental at that time. |
sycl/doc/extensions/proposed/sycl_ext_intel_register_mode.asciidoc
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Signed-off-by: Sarnie, Nick <nick.sarnie@intel.com>
sarnex
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Signed-off-by: Sarnie, Nick <nick.sarnie@intel.com>
| The supported values are as follows: | ||
| [%header,cols="1,5"] | ||
| |=== | ||
| |GPU |Supported Values |
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GPU thread (which has register resource) is used to schedule each sub-group. And after sub-group size is determined, the kernel (work item in the subgroup) should use all the register as much as possible, so while do we need a setting to limit the using of registers? do you have example to show the usage of this new property. Thanks.
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the problem is the GPU driver decides how many registers are available, there are two options, small (128) and large (256) and right now it always picks small. large may help if there is high register pressure. i don't have a specific example i can share here, but we have many cases internally showing improved performance with large mode. the spec has a code snippet with an example but it is not implemented yet.
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In https://www.intel.com/content/www/us/en/docs/oneapi/optimization-guide-gpu/2023-1/small-register-mode-vs-large-register-mode.html, " set_kernel_properties(kernel_properties::use_large_grf); " is used to guide compiler to use large register file for specific kernel, so why do we need anther property to set small(128) or large(256)? Thanks.
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I'm moving this conversation thread offline.
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@gmlueck Are you okay with merging this PR, or should we wait for the outcome of the offline conversation? All feedback about this PR should be addressed. Thanks
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I think we can merge this PR.
The resolution of the offline discussion may affect other things, but not this PR.
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Sounds good @intel/llvm-gatekeepers can we merge this one? Thanks!
This extension is used to specify the register mode on an Intel GPU. Currently we only support specific register mode values on specific GPUs. --------- Signed-off-by: Sarnie, Nick <nick.sarnie@intel.com>
This extension is used to specify the register mode on an Intel GPU.
Currently we only support specific register mode values on specific GPUs.