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[Driver][SYCL] Improve FPGA archive device unbundling with AOCO #9572

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3 changes: 3 additions & 0 deletions clang/include/clang/Driver/OffloadBundler.h
Original file line number Diff line number Diff line change
Expand Up @@ -43,6 +43,9 @@ class OffloadBundlerConfig {
std::vector<std::string> TargetNames;
std::vector<std::string> InputFileNames;
std::vector<std::string> OutputFileNames;

// List of excluded target names from unbundling.
std::vector<std::string> ExcludedTargetNames;
};

class OffloadBundler {
Expand Down
5 changes: 0 additions & 5 deletions clang/lib/Driver/Driver.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -6747,11 +6747,6 @@ class OffloadingActionBuilder final {
// not needed for emulation, as these are treated as regular archives.
if (!C.getDriver().isFPGAEmulationMode())
unbundleStaticLib(types::TY_FPGA_AOCO, LA);
// Do not unbundle any AOCO archive as a regular archive when we are
// in FPGA Hardware/Simulation mode.
if (!C.getDriver().isFPGAEmulationMode() &&
hasFPGABinary(C, LA.str(), types::TY_FPGA_AOCO))
continue;
unbundleStaticLib(types::TY_Archive, LA);
}
}
Expand Down
90 changes: 90 additions & 0 deletions clang/lib/Driver/OffloadBundler.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -59,6 +59,7 @@
#include <set>
#include <string>
#include <system_error>
#include <unordered_set>
#include <utility>

using namespace llvm;
Expand All @@ -71,6 +72,8 @@ using namespace clang;
/// Section name which holds target symbol names.
#define SYMBOLS_SECTION_NAME ".tgtsym"

#define DEBUG_TYPE "clang-offload-bundler"

OffloadTargetInfo::OffloadTargetInfo(const StringRef Target,
const OffloadBundlerConfig &BC)
: BundlerConfig(BC) {
Expand Down Expand Up @@ -1015,6 +1018,10 @@ class ArchiveFileHandler final : public FileHandler {
.Case("a", OutputType::Archive)
.Default(OutputType::Unknown);

// Set contains indexes of Children that should be skipped during
// unbundling.
std::unordered_set<size_t> ExcludedChildIndexes;

public:
ArchiveFileHandler(const OffloadBundlerConfig &BC) : BundlerConfig(BC) {}
~ArchiveFileHandler() = default;
Expand All @@ -1029,8 +1036,10 @@ class ArchiveFileHandler final : public FileHandler {
Ar = std::move(*ArOrErr);

// Read all children.
ssize_t ChildIndex = -1;
Error Err = Error::success();
for (auto &C : Ar->children(Err)) {
++ChildIndex;
auto BinOrErr = C.getAsBinary();
if (!BinOrErr) {
if (auto Err = isNotObjectErrorInvalidFileType(BinOrErr.takeError()))
Expand All @@ -1042,6 +1051,16 @@ class ArchiveFileHandler final : public FileHandler {
if (!Bin->isObject())
continue;

auto CheckOrErr = CheckIfObjectFileContainsExcludedTargets(C);
if (!CheckOrErr)
return CheckOrErr.takeError();

if (*CheckOrErr) {
LLVM_DEBUG(outs() << "Add child to ban list. Index: " << ChildIndex
<< "\n");
ExcludedChildIndexes.emplace(ChildIndex);
}

auto Obj = std::unique_ptr<ObjectFile>(cast<ObjectFile>(Bin.release()));
auto Buf = MemoryBuffer::getMemBuffer(Obj->getMemoryBufferRef(), false);

Expand Down Expand Up @@ -1099,7 +1118,14 @@ class ArchiveFileHandler final : public FileHandler {

// Read all children.
Error Err = Error::success();
ssize_t ChildIndex = -1;
for (auto &C : Ar->children(Err)) {
++ChildIndex;
if (ExcludedChildIndexes.count(ChildIndex)) {
LLVM_DEBUG(outs() << "Skip Child. Index: " << ChildIndex << "\n");
continue;
}

auto BinOrErr = C.getAsBinary();
if (!BinOrErr) {
if (auto Err = isNotObjectErrorInvalidFileType(BinOrErr.takeError()))
Expand Down Expand Up @@ -1215,6 +1241,70 @@ class ArchiveFileHandler final : public FileHandler {
Error WriteBundle(raw_fd_ostream &OS, MemoryBuffer &Input) override {
llvm_unreachable("unsupported for the ArchiveFileHandler");
}

private:
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@asudarsa asudarsa May 26, 2023

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We are opening and parsing the file here an additional time for every child. This can prove expensive. There must be a way to do this 'exclusion' on the fly using a single parse of the file. But we can do that as a subsequent work. Please add a TODO here.

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I thought about this optimizations.
There is a cost we should always consider is that this tool is from community. And we should resolve conflicts in sycl-web every time something comes from community in this functionality. So if we change the archive processing significantly in terms of a code then conflict resolving could turn into hard work for one who will maintain this stuff (it is me or somebody from our team).

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@maksimsab maksimsab May 26, 2023

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This is surely not a blocker for this PR. But we need to address this and atleast verify that this does not increase compile time by a lot. Thanks

// NOTE: mostly a copy-paste of ReadHeader method.
Expected<std::vector<std::string>>
ReadTargetsFromChild(const Archive::Child &C) {
Expected<std::unique_ptr<Binary>> BinOrErr = C.getAsBinary();
if (!BinOrErr)
return BinOrErr.takeError();

std::unique_ptr<Binary> &Bin = BinOrErr.get();
auto Obj = std::unique_ptr<ObjectFile>(cast<ObjectFile>(Bin.release()));
std::unique_ptr<MemoryBuffer> Buf =
MemoryBuffer::getMemBuffer(Obj->getMemoryBufferRef(), false);
ObjectFileHandler OFH(std::move(Obj), BundlerConfig);
if (Error Err = OFH.ReadHeader(*Buf))
return Err;
Expected<std::optional<StringRef>> NameOrErr = OFH.ReadBundleStart(*Buf);
if (!NameOrErr)
return NameOrErr.takeError();

std::vector<std::string> Targets;
while (*NameOrErr) {
if (*NameOrErr)
Targets.emplace_back((**NameOrErr).str());
NameOrErr = OFH.ReadBundleStart(*Buf);
if (!NameOrErr)
return NameOrErr.takeError();
}

return Targets;
}

bool CheckIfTargetIsExcluded(StringRef Triple) {
// NOTE: "-sycldevice" Triple component has been deprecated.
// However, it still can be met in libraries that have been compiled before
// deprecation. For example, here Triple might be the following:
// sycl-fpga_aoco-intel-unknown-sycldevice
//
// The workaround is to strip this Triple component if it is present.
Triple.consume_back("-sycldevice");
Comment on lines +1277 to +1283
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We have dropped support for such binaries, no need to have that workaround anymore, see #9408

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Well, it looks like FPGA libraries still depend on it. We asked them how did it happen. But it doesn't look like we can drop support of "sycldevice" env.

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We have effectively done that already. We do aim to preserve backwards compatibility generally, but right now we are in ABI-breaking window and we are allowed to cleanup legacy code, thus breaking backwards compatibility.

const auto &ExcludedTargetNames = BundlerConfig.ExcludedTargetNames;
auto It = std::find(ExcludedTargetNames.begin(), ExcludedTargetNames.end(),
Triple);
return It != ExcludedTargetNames.end();
}

// Function reads targets from Child and checks whether one of Targets
// is in Excluded list.
Expected<bool>
CheckIfObjectFileContainsExcludedTargets(const Archive::Child &C) {
if (BundlerConfig.ExcludedTargetNames.empty())
return false;

auto TargetNamesOrErr = ReadTargetsFromChild(C);
if (!TargetNamesOrErr)
return TargetNamesOrErr.takeError();

auto TargetNames = TargetNamesOrErr.get();
for (const auto &TargetName : TargetNames)
if (CheckIfTargetIsExcluded(TargetName))
return true;

return false;
}
};

/// Return an appropriate object file handler. We use the specific object
Expand Down
26 changes: 24 additions & 2 deletions clang/lib/Driver/ToolChains/Clang.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -9088,15 +9088,37 @@ void OffloadBundler::ConstructJobMultipleOutputs(
TypeArg = "o";

bool HasSPIRTarget = false;
bool HasFPGATarget = false;
auto SYCLTCRange = C.getOffloadToolChains<Action::OFK_SYCL>();
for (auto TI = SYCLTCRange.first, TE = SYCLTCRange.second; TI != TE; ++TI)
HasSPIRTarget |= TI->second->getTriple().isSPIR();
for (auto TI = SYCLTCRange.first, TE = SYCLTCRange.second; TI != TE; ++TI) {
llvm::Triple TT(TI->second->getTriple());
if (TT.isSPIR()) {
HasSPIRTarget = true;
if (TT.getSubArch() == llvm::Triple::SPIRSubArch_fpga)
HasFPGATarget = true;
}
}
if (InputType == types::TY_Archive && HasSPIRTarget)
TypeArg = "aoo";

// Get the type.
CmdArgs.push_back(TCArgs.MakeArgString(Twine("-type=") + TypeArg));

// For FPGA Archives that contain AOCO in them, we only want to unbundle
// the objects from the archive that do not have AOCO associated in that
// specific object. Only do this when in hardware mode.
if (InputType == types::TY_Archive && HasFPGATarget && !IsFPGADepUnbundle &&
!IsFPGADepLibUnbundle && !C.getDriver().isFPGAEmulationMode()) {
llvm::Triple TT;
TT.setArchName(types::getTypeName(types::TY_FPGA_AOCO));
TT.setVendorName("intel");
TT.setOS(getToolChain().getTriple().getOS());
SmallString<128> ExcludedTargets("-excluded-targets=");
ExcludedTargets += "sycl-";
ExcludedTargets += TT.normalize();
CmdArgs.push_back(TCArgs.MakeArgString(ExcludedTargets));
}

// Get the targets.
SmallString<128> Triples;
Triples += "-targets=";
Expand Down
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36 changes: 36 additions & 0 deletions clang/test/Driver/clang-offload-bundler-exclude.c
Original file line number Diff line number Diff line change
@@ -0,0 +1,36 @@
// This test prepares Archive input for clang-offload-bundler
// and checks -exclude-target command line option.
// Option should exclude fat_device_aoco object file.

// UNSUPPORTED: system-windows

// The test uses assembled archive file fatlib.a.
// The assembly algorithm is the following:
// echo "DUMMY IR FILE" > device
// echo "DUMMY IR2 FILE" > device2
// echo "DUMMY AOCO FILE" > aoco
// echo "DUMMY HOST FILE" > host
// echo "DUMMY HOST2 FILE" > host2
// # Wrap and compile objects
// clang-offload-wrapper -o=device.bc -host=x86_64-unknown-linux-gnu -target=spir64 -kind=sycl device
// clang-offload-wrapper -o=device2.bc -host=x86_64-unknown-linux-gnu -target=spir64 -kind=sycl device2
// clang-offload-wrapper -o=aoco.bc -host=x86_64-unknown-linux-gnu -target=spir64 -kind=sycl aoco
// clang-offload-wrapper -o=host.bc -host=x86_64-unknown-linux-gnu -target=spir64 -kind=sycl host
// clang-offload-wrapper -o=host2.bc -host=x86_64-unknown-linux-gnu -target=spir64 -kind=sycl host2
// llc -filetype=obj -o device.o device.bc
// llc -filetype=obj -o device2.o device2.bc
// llc -filetype=obj -o aoco.o aoco.bc
// llc -filetype=obj -o host.o host.bc
// llc -filetype=obj -o host2.o host2.bc
// # Bundle the objects
// clang-offload-bundler -input=device.o -input=host.o -output=fat_device.o -targets=sycl-spir64_fpga-unknown-unknown,host-x86_64-unknown-linux-gnu -type=o
// clang-offload-bundler -input=device2.o -input=aoco.o -input=host2.o -output=fat_device_aoco.o -targets=sycl-spir64_fpga-unknown-unknown,sycl-fpga_aoco-intel-unknown,host-x86_64-unknown-linux-gnu -type=o
// # Create the archive
// ar cr fatlib.a fat_device.o fat_device_aoco.o


// Unbundle archive
// RUN: clang-offload-bundler -type=aoo -excluded-targets=sycl-fpga_aoco-intel-unknown -targets=sycl-spir64_fpga-unknown-unknown -input=%S/Inputs/clang-offload-bundler-exclude/fatlib.a -output=%t-my_output.txt -unbundle -allow-missing-bundles

// Check that output of unbundling doesn't contain content of device2
// RUN: cat %t-my_output.txt | xargs cat | strings | not grep "DUMMY IR2"
38 changes: 22 additions & 16 deletions clang/test/Driver/sycl-intelfpga-aoco-win.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -12,10 +12,10 @@
// RUN: %clangxx -target x86_64-pc-windows-msvc -fsycl -fno-sycl-instrument-device-code -fno-sycl-device-lib=all -fintelfpga -Xshardware %t_aoco.a %s -ccc-print-phases 2>&1 \
// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCO-PHASES-WIN %s
// CHK-FPGA-AOCO-PHASES-WIN: 0: input, "[[INPUTA:.+\.a]]", object, (host-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 1: input, "[[INPUTSRC:.+\.cpp]]", c++, (host-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 1: input, "[[INPUTCPP:.+\.cpp]]", c++, (host-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 2: append-footer, {1}, c++, (host-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 3: preprocessor, {2}, c++-cpp-output, (host-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 4: input, "[[INPUTSRC]]", c++, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 4: input, "[[INPUTCPP]]", c++, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 5: preprocessor, {4}, c++-cpp-output, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 6: compiler, {5}, ir, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 7: offload, "host-sycl (x86_64-pc-windows-msvc)" {3}, "device-sycl (spir64_fpga-unknown-unknown)" {6}, c++-cpp-output
Expand All @@ -25,29 +25,35 @@
// CHK-FPGA-AOCO-PHASES-WIN: 11: linker, {0, 10}, image, (host-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 12: linker, {0, 10}, host_dep_image, (host-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 13: clang-offload-deps, {12}, ir, (host-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 14: linker, {6, 13}, ir, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 15: sycl-post-link, {14}, tempfiletable, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 16: file-table-tform, {15}, tempfilelist, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 17: llvm-spirv, {16}, tempfilelist, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 18: input, "[[INPUTA]]", archive
// CHK-FPGA-AOCO-PHASES-WIN: 19: clang-offload-unbundler, {18}, fpga_dep_list
// CHK-FPGA-AOCO-PHASES-WIN: 20: input, "[[INPUTA]]", fpga_aoco
// CHK-FPGA-AOCO-PHASES-WIN: 21: clang-offload-unbundler, {20}, fpga_aoco
// CHK-FPGA-AOCO-PHASES-WIN: 22: backend-compiler, {17, 19, 21}, fpga_aocx, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 23: file-table-tform, {15, 22}, tempfiletable, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 24: clang-offload-wrapper, {23}, object, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 25: offload, "host-sycl (x86_64-pc-windows-msvc)" {11}, "device-sycl (spir64_fpga-unknown-unknown)" {24}, image
// CHK-FPGA-AOCO-PHASES-WIN: 14: input, "[[INPUTA]]", archive
// CHK-FPGA-AOCO-PHASES-WIN: 15: clang-offload-unbundler, {14}, tempfilelist
// CHK-FPGA-AOCO-PHASES-WIN: 16: spirv-to-ir-wrapper, {15}, tempfilelist, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 17: linker, {6, 13, 16}, ir, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 18: sycl-post-link, {17}, tempfiletable, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 19: file-table-tform, {18}, tempfilelist, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 20: llvm-spirv, {19}, tempfilelist, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 21: input, "[[INPUTA]]", archive
// CHK-FPGA-AOCO-PHASES-WIN: 22: clang-offload-unbundler, {21}, fpga_dep_list
// CHK-FPGA-AOCO-PHASES-WIN: 23: input, "[[INPUTA]]", fpga_aoco
// CHK-FPGA-AOCO-PHASES-WIN: 24: clang-offload-unbundler, {23}, fpga_aoco
// CHK-FPGA-AOCO-PHASES-WIN: 25: backend-compiler, {20, 22, 24}, fpga_aocx, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 26: file-table-tform, {18, 25}, tempfiletable, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 27: clang-offload-wrapper, {26}, object, (device-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 28: offload, "host-sycl (x86_64-pc-windows-msvc)" {11}, "device-sycl (spir64_fpga-unknown-unknown)" {27}, image

/// aoco test, checking tools
// RUN: %clang_cl --target=x86_64-pc-windows-msvc -fsycl -fno-sycl-instrument-device-code -fno-sycl-device-lib=all -fintelfpga %t_aoco.a -Xshardware -### %s 2>&1 \
// RUN: | FileCheck -check-prefix=CHK-FPGA-AOCO %s
// RUN: %clang_cl --target=x86_64-pc-windows-msvc -fsycl -fno-sycl-instrument-device-code -fno-sycl-device-lib=all -fintelfpga %t_aoco.a -Xshardware -### %s 2>&1 \
// RUN: | FileCheck -check-prefix=CHK-FPGA-AOCO %s
// CHK-FPGA-AOCO: clang-offload-bundler{{.*}} "-type=aoo" "-excluded-targets=sycl-fpga_aoco-intel-unknown" "-targets=sycl-spir64_fpga-unknown-unknown" "-input=[[INPUTLIB:.+\.a]]" "-output=[[LIBLIST:.+\.txt]]" "-unbundle"
// CHK-FPGA-AOCO: spirv-to-ir-wrapper{{.*}} "[[LIBLIST]]" "-o" "[[LIBLIST2:.+\.txt]]"
// CHK-FPGA-AOCO: llvm-link{{.*}} "-o" "[[LINKEDBC:.+\.bc]]"
// CHK-FPGA-AOCO: sycl-post-link{{.*}} "-split-esimd"{{.*}} "-O2" "-spec-const=default" {{.*}} "-o" "[[SPLTABLE:.+\.table]]" "[[LINKEDBC]]"
// CHK-FPGA-AOCO: llvm-link{{.*}} "--only-needed" "[[LINKEDBC]]" "@[[LIBLIST2]]" "-o" "[[LINKEDBC2:.+\.bc]]"
// CHK-FPGA-AOCO: sycl-post-link{{.*}} "-split-esimd"{{.*}} "-O2" "-spec-const=default" "-device-globals" "-o" "[[SPLTABLE:.+\.table]]" "[[LINKEDBC2]]"
// CHK-FPGA-AOCO: file-table-tform{{.*}} "-o" "[[TABLEOUT:.+\.txt]]" "[[SPLTABLE]]"
// CHK-FPGA-AOCO: llvm-spirv{{.*}} "-o" "[[TARGSPV:.+\.txt]]" {{.*}} "[[TABLEOUT]]"
// CHK-FPGA-AOCO: clang-offload-bundler{{.*}} "-type=aoo" "-targets=sycl-fpga_aoco-intel-unknown" "-input=[[INPUTLIB:.+\.a]]" "-output=[[AOCOLIST:.+\.txt]]" "-unbundle"
// CHK-FPGA-AOCO: clang-offload-bundler{{.*}} "-type=aoo" "-targets=sycl-fpga_aoco-intel-unknown" "-input=[[INPUTLIB]]" "-output=[[AOCOLIST:.+\.txt]]" "-unbundle"
// CHK-FPGA-AOCO: aoc{{.*}} "-o" "[[AOCXOUT:.+\.aocx]]" "[[TARGSPV]]" "-library-list=[[AOCOLIST]]" "-sycl"
// CHK-FPGA-AOCO: file-table-tform{{.*}} "-o" "[[TABLEOUT2:.+\.table]]" "[[SPLTABLE]]" "[[AOCXOUT]]"
// CHK-FPGA-AOCO: clang-offload-wrapper{{.*}} "-o=[[FINALBC:.+\.bc]]" {{.*}} "-target=spir64_fpga" "-kind=sycl" "-batch" "[[TABLEOUT2]]"
Expand Down
34 changes: 20 additions & 14 deletions clang/test/Driver/sycl-intelfpga-aoco.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -29,18 +29,21 @@
// CHK-FPGA-AOCO-PHASES: 11: linker, {0, 10}, image, (host-sycl)
// CHK-FPGA-AOCO-PHASES: 12: linker, {0, 10}, host_dep_image, (host-sycl)
// CHK-FPGA-AOCO-PHASES: 13: clang-offload-deps, {12}, ir, (host-sycl)
// CHK-FPGA-AOCO-PHASES: 14: linker, {6, 13}, ir, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 15: sycl-post-link, {14}, tempfiletable, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 16: file-table-tform, {15}, tempfilelist, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 17: llvm-spirv, {16}, tempfilelist, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 18: input, "[[INPUTA]]", archive
// CHK-FPGA-AOCO-PHASES: 19: clang-offload-unbundler, {18}, fpga_dep_list
// CHK-FPGA-AOCO-PHASES: 20: input, "[[INPUTA]]", fpga_aoco
// CHK-FPGA-AOCO-PHASES: 21: clang-offload-unbundler, {20}, fpga_aoco
// CHK-FPGA-AOCO-PHASES: 22: backend-compiler, {17, 19, 21}, fpga_aocx, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 23: file-table-tform, {15, 22}, tempfiletable, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 24: clang-offload-wrapper, {23}, object, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 25: offload, "host-sycl (x86_64-unknown-linux-gnu)" {11}, "device-sycl (spir64_fpga-unknown-unknown)" {24}, image
// CHK-FPGA-AOCO-PHASES: 14: input, "[[INPUTA]]", archive
// CHK-FPGA-AOCO-PHASES: 15: clang-offload-unbundler, {14}, tempfilelist
// CHK-FPGA-AOCO-PHASES: 16: spirv-to-ir-wrapper, {15}, tempfilelist, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 17: linker, {6, 13, 16}, ir, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 18: sycl-post-link, {17}, tempfiletable, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 19: file-table-tform, {18}, tempfilelist, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 20: llvm-spirv, {19}, tempfilelist, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 21: input, "[[INPUTA]]", archive
// CHK-FPGA-AOCO-PHASES: 22: clang-offload-unbundler, {21}, fpga_dep_list
// CHK-FPGA-AOCO-PHASES: 23: input, "[[INPUTA]]", fpga_aoco
// CHK-FPGA-AOCO-PHASES: 24: clang-offload-unbundler, {23}, fpga_aoco
// CHK-FPGA-AOCO-PHASES: 25: backend-compiler, {20, 22, 24}, fpga_aocx, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 26: file-table-tform, {18, 25}, tempfiletable, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 27: clang-offload-wrapper, {26}, object, (device-sycl)
// CHK-FPGA-AOCO-PHASES: 28: offload, "host-sycl (x86_64-unknown-linux-gnu)" {11}, "device-sycl (spir64_fpga-unknown-unknown)" {27}, image

/// aoco test, checking tools
// RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fno-sycl-instrument-device-code -fno-sycl-device-lib=all -fintelfpga -Xshardware -foffload-static-lib=%t_aoco.a -### %s 2>&1 \
Expand All @@ -51,11 +54,14 @@
// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCO,CHK-FPGA-AOCO-WIN %s
// RUN: %clang_cl -fsycl -fno-sycl-instrument-device-code -fno-sycl-device-lib=all -fintelfpga -Xshardware %t_aoco_cl.a -### %s 2>&1 \
// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCO,CHK-FPGA-AOCO-WIN %s
// CHK-FPGA-AOCO: clang-offload-bundler{{.*}} "-type=aoo" "-excluded-targets=sycl-fpga_aoco-intel-unknown" "-targets=sycl-spir64_fpga-unknown-unknown" "-input=[[INPUTLIB:.+\.a]]" "-output=[[LIBLIST:.+\.txt]]" "-unbundle"
// CHK-FPGA-AOCO: spirv-to-ir-wrapper{{.*}} "[[LIBLIST]]" "-o" "[[LIBLIST2:.+\.txt]]"
// CHK-FPGA-AOCO: llvm-link{{.*}} "-o" "[[LINKEDBC:.+\.bc]]"
// CHK-FPGA-AOCO: sycl-post-link{{.*}} "-split-esimd"{{.*}} "-O2" "-spec-const=default" "-device-globals" "-o" "[[SPLTABLE:.+\.table]]" "[[LINKEDBC]]"
// CHK-FPGA-AOCO: llvm-link{{.*}} "--only-needed" "[[LINKEDBC]]" "@[[LIBLIST2]]" "-o" "[[LINKEDBC2:.+\.bc]]"
// CHK-FPGA-AOCO: sycl-post-link{{.*}} "-split-esimd"{{.*}} "-O2" "-spec-const=default" "-device-globals" "-o" "[[SPLTABLE:.+\.table]]" "[[LINKEDBC2]]"
// CHK-FPGA-AOCO: file-table-tform{{.*}} "-o" "[[TABLEOUT:.+\.txt]]" "[[SPLTABLE]]"
// CHK-FPGA-AOCO: llvm-spirv{{.*}} "-o" "[[TARGSPV:.+\.txt]]" {{.*}} "[[TABLEOUT]]"
// CHK-FPGA-AOCO: clang-offload-bundler{{.*}} "-type=aoo" "-targets=sycl-fpga_aoco-intel-unknown" "-input=[[INPUTLIB:.+\.a]]" "-output=[[AOCOLIST:.+\.txt]]" "-unbundle"
// CHK-FPGA-AOCO: clang-offload-bundler{{.*}} "-type=aoo" "-targets=sycl-fpga_aoco-intel-unknown" "-input=[[INPUTLIB]]" "-output=[[AOCOLIST:.+\.txt]]" "-unbundle"
// CHK-FPGA-AOCO: aoc{{.*}} "-o" "[[AOCXOUT:.+\.aocx]]" "[[TARGSPV]]" "-library-list=[[AOCOLIST]]" "-sycl"
// CHK-FPGA-AOCO: file-table-tform{{.*}} "-o" "[[TABLEOUT2:.+\.table]]" "[[SPLTABLE]]" "[[AOCXOUT]]"
// CHK-FPGA-AOCO: clang-offload-wrapper{{.*}} "-o=[[FINALBC:.+\.bc]]" {{.*}} "-target=spir64_fpga" "-kind=sycl" "-batch" "[[TABLEOUT2]]"
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