[SYCL] Support per-object file compilation #7595
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Signed-off-by: Sarnie, Nick <nick.sarnie@intel.com>
Signed-off-by: Sarnie, Nick <nick.sarnie@intel.com>
Signed-off-by: Sarnie, Nick <nick.sarnie@intel.com>
Signed-off-by: Sarnie, Nick <nick.sarnie@intel.com>
Signed-off-by: Sarnie, Nick <nick.sarnie@intel.com>
sarnex
changed the title
Today, the basic flow of the SYCL device-side driver is as follows 1) Link all device code from all compiler inputs together 2) Link 1) against SYCL device libraries 3) Run sycl-post-link on 2) 4) Run llvm-spirv on 3) 5) Run clang-offload-wrapper on 4) Step 1 can create a performance bottleneck when you have a huge number of kernels. If none of the kernels use globals or SYCL_EXTERNAL functions, we can actually split it up to be the following: For object file: 1) Link this object file's device code with SYCL device libraries 2) Run sycl-post-link on 1) 3) Run llvm-spirv on 2) 4) Run clang-offload-wrapper on 4) Since we don't link all device code together, each step runs on smaller IR which results in compiler runtime and compiler memory usage benefits. Note that in order to do the above per-object-file, we need to break up fat static arhives. We do this by using the ForEachWrappingAction action. This allows us to run commands on each item inside the fat static archive The driver flow when a static archive is involved is the most complex case and looks like the below: 1) spriv-to-ir-wrapper on fat static archive 2) Link all SYCL device libraries together without any user device code into a single device library BC 3) llvm-foreach: 3a): llvm-link current object file with 2) 4) file-table-tform replacing tempfilelist from 1) with output of 3) 5) llvm-foreach: 5a) sycl-post-link on 4) 6) llvm-foreach: 6a) Extract BC file column from 5) output table 7) file-table-tform on 6) merging all BC file columns into a single big column 8) llvm-spirv on 7) (does llvm-foreach internally) 9) file-table-tform on 5) output table, replacing BC column with spirv column from 8) 10) clang-offload-wrapper with 9) Signed-off-by: Sarnie, Nick <nick.sarnie@intel.com>
I don't really like this commit, but I see the following requirements 1) Keep the default for GPURelocatableDeviceCode to false 2) For sycl, if no cc1 option is specified, GPURelocatableDeviceCode should be true Let me know if anyone has any better ideas Signed-off-by: Sarnie, Nick <nick.sarnie@intel.com>
Signed-off-by: Sarnie, Nick <nick.sarnie@intel.com>
mdtoguchi
reviewed
Dec 2, 2022
premanandrao
reviewed
Dec 2, 2022
mdtoguchi
reviewed
Dec 2, 2022
Signed-off-by: Sarnie, Nick <nick.sarnie@intel.com>
Signed-off-by: Sarnie, Nick <nick.sarnie@intel.com>
Signed-off-by: Sarnie, Nick <nick.sarnie@intel.com>
bader
reviewed
Dec 6, 2022
Signed-off-by: Sarnie, Nick <nick.sarnie@intel.com>
Signed-off-by: Sarnie, Nick <nick.sarnie@intel.com>
Signed-off-by: Sarnie, Nick <nick.sarnie@intel.com>
|
@AlexeySachkov @mdtoguchi Any more feedback on this bad boy? I think I addressed all feedback. Thanks! |
mdtoguchi
approved these changes
Dec 8, 2022
Signed-off-by: Sarnie, Nick <nick.sarnie@intel.com>
Signed-off-by: Sarnie, Nick <nick.sarnie@intel.com>
|
@premanandrao Do you mind re-checking the FE changes? I had to rework them |
AlexeySachkov
approved these changes
Dec 9, 2022
smanna12
approved these changes
Dec 9, 2022
|
Thanks, with the CFE re-review complete we are now ready to merge! |
Thanks, I have no further concerns. |
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@intel/llvm-gatekeepers Mind merging this one? Thanks! |
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This change adds per-object compilation support for SYCL, also called non-relocatable device code mode. This is already supported in clang for HIP and CUDA.
It adds a new option -f[no-]sycl-rdc. The default is -fsycl-rdc, which compiles code as today. Passing -fno-sycl-rdc activates the new mode. This is just an alias to the existing flag used by AMD/CUDA, f[no-]-gpu-rdc.
The main implication is that we no longer link all device code together into one big module before post link.
Instead, we execute all jobs after device linking on a per-object file basis.
This means sycl-post-link and the later jobs execute multiple times, since we no longer have one big module.
This can result in large improvement performance in the compiler runtime and memory usage, we see a max memory usage reduction for QUDA with -g from over 250GB to 4GB and a large compiler runtime improvement as well.
Error cases: