[SYCL][ESIMD][EMU] Handle intrinsic operations promoted to 4-byte element type #5727

dongkyunahn-intel · 2022-03-03T23:34:56Z

scatter_impl() and gather_impl() in memory.hpp promote argument/return vector to 4-byte elements
ESIMD_EMULATOR backend handles this promoted vectors

…lement type - scatter_impl() and gather_impl() in memory.hpp promote argument/return vector to 4-byte elements - ESIMD_EMULATOR backend handles this promoted vectors

dongkyunahn-intel · 2022-03-03T23:36:01Z

This PR replaces #5702

sycl/include/sycl/ext/intel/experimental/esimd/detail/memory_intrin.hpp

…ntrin.hpp Co-authored-by: kbobrovs <Konstantin.S.Bobrovsky@intel.com>

sycl/include/sycl/ext/intel/experimental/esimd/detail/memory_intrin.hpp

kbobrovs · 2022-03-04T22:48:13Z

sycl/include/sycl/ext/intel/experimental/esimd/detail/memory_intrin.hpp

@@ -646,6 +657,14 @@ __esimd_gather_masked_scaled2(SurfIndAliasTy surf_ind, uint32_t global_offset,
 {
  static_assert(Scale == 0);

+  // ActualTy - Reverse of 'PromoT' in memory.hpp
+  using ActualTy = std::conditional_t<


sycl/include/sycl/ext/intel/experimental/esimd/detail/memory_intrin.hpp

- clang-format fix - Replacing ActualTy with OrigTyAsInt - 'gather' implementation

…romot_memory_intrinsic

sycl/include/sycl/ext/intel/esimd/detail/memory_intrin.hpp

bader · 2022-03-16T16:58:07Z

@alexbatashev, take a look at https://github.com/intel/llvm/actions/runs/1966876941.

[SYCL: .github#L1](https://github.com/intel/llvm/pull/5727/files#annotation_2987610469)
Error when evaluating 'strategy' for job 'llvm_test_suite'. intel/llvm/.github/workflows/sycl_linux_build_and_test.yml@a7d4216e937cfd2a18965af6f4bcd92bc1fafec4 (Line: 196, Col: 18): Error parsing fromJson,intel/llvm/.github/workflows/sycl_linux_build_and_test.yml@a7d4216e937cfd2a18965af6f4bcd92bc1fafec4 (Line: 196, Col: 18): Error reading JToken from JsonReader. Path '', line 0, position 0.,intel/llvm/.github/workflows/sycl_linux_build_and_test.yml@a7d4216e937cfd2a18965af6f4bcd92bc1fafec4 (Line: 196, Col: 18): Unexpected type of value '', expected type: Sequence.

Do you have any clues what might cause this error? I don't see any changes in workflow files, so it's strange that GitHub Actions is not able to parse them for this particular PR. I'll restart GHA pre-commit to get complete validation results.

…romot_memory_intrinsic

alexbatashev · 2022-03-16T17:02:10Z

@alexbatashev, take a look at https://github.com/intel/llvm/actions/runs/1966876941.
[SYCL: .github#L1](https://github.com/intel/llvm/pull/5727/files#annotation_2987610469)
Error when evaluating 'strategy' for job 'llvm_test_suite'. intel/llvm/.github/workflows/sycl_linux_build_and_test.yml@a7d4216e937cfd2a18965af6f4bcd92bc1fafec4 (Line: 196, Col: 18): Error parsing fromJson,intel/llvm/.github/workflows/sycl_linux_build_and_test.yml@a7d4216e937cfd2a18965af6f4bcd92bc1fafec4 (Line: 196, Col: 18): Error reading JToken from JsonReader. Path '', line 0, position 0.,intel/llvm/.github/workflows/sycl_linux_build_and_test.yml@a7d4216e937cfd2a18965af6f4bcd92bc1fafec4 (Line: 196, Col: 18): Unexpected type of value '', expected type: Sequence.
Do you have any clues what might cause this error? I don't see any changes in workflow files, so it's strange that GitHub Actions is not able to parse them for this particular PR. I'll restart GHA pre-commit to get complete validation results.

Looks like there was an attempt to restart a single job. That feature was released today, and seems to be broken.

…romot_memory_intrinsic

This reverts commit 5913d06.

- Intermediate vectors are added to contain type-adjusted values bridging between 'RestoredTy' (restored with TySizeLog2) and 'Ty'

sycl/include/sycl/ext/intel/esimd/detail/memory_intrin.hpp

kbobrovs · 2022-03-19T00:48:36Z

sycl/include/sycl/ext/intel/esimd/detail/memory_intrin.hpp

@@ -449,8 +469,9 @@ __esimd_scatter_scaled(__ESIMD_DNS::simd_mask_storage_t<N> pred,

    for (int idx = 0; idx < N; idx++) {
      if (pred[idx]) {
-        Ty *addr = reinterpret_cast<Ty *>(elem_offsets[idx] + writeBase);
-        *addr = vals[idx];
+        RestoredTy *addr =


For later: please check with CM library devs that acquiring a mutex is really needed when accessing through a cm buffer. That seems really strange requirement. It is also strange that no mutex is needed when accessing SLM.

Will check with CM Lib devs.

Issue ticket : #5863

kbobrovs · 2022-03-19T00:50:02Z

sycl/include/sycl/ext/intel/esimd/detail/memory_intrin.hpp

+    return __ESIMD_DNS::bitcast<Ty, RestoredTy, N>(retv);
+  } else {
+    __ESIMD_DNS::vector_type_t<Ty, N> Adjusted = 0;
+    // TODO : Built-in function??


see convert_vector above

dongkyunahn-intel · 2022-03-19T03:45:07Z

/verify with intel/llvm-test-suite#928

dongkyunahn-intel · 2022-03-21T17:41:07Z

/verify with intel/llvm-test-suite#928

dongkyunahn-intel · 2022-03-21T19:55:53Z

@vladimirlaz , would you help me run CI for this PR with following intel/llvm-test-suite PR? XFAIL markings need to be removed in order to prevent 'Unexpected passes' caused by this PR.

intel/llvm-test-suite#928

kbobrovs · 2022-03-22T00:13:50Z

@dongkyunahn-intel, I see clang FE crashes on these sometimes:
[2022-03-19T03:48:31.028Z] Failed Tests (2):
[2022-03-19T03:48:31.028Z] SYCL :: ESIMD/Prefix_Local_sum3.cpp
[2022-03-19T03:48:31.028Z] SYCL :: ESIMD/Stencil.cpp

Could you please file an internal ticket on FE? Do you know if this is flaky failure?

dongkyunahn-intel · 2022-03-22T19:59:12Z

Could you please file an internal ticket on FE? Do you know if this is flaky failure?

It looks like flaky failures. My another PR (#5606) does not show those failures.

dongkyunahn-intel · 2022-03-22T21:03:05Z

@dongkyunahn-intel, I see clang FE crashes on these sometimes: [2022-03-19T03:48:31.028Z] Failed Tests (2): [2022-03-19T03:48:31.028Z] SYCL :: ESIMD/Prefix_Local_sum3.cpp [2022-03-19T03:48:31.028Z] SYCL :: ESIMD/Stencil.cpp

Could you please file an internal ticket on FE? Do you know if this is flaky failure?

These failures are gone after retrying failing tests. Now there are four unexpected passes (to be resolved with intel/llvm-test-suite#928) and one timeout (BitonicSortkv2).

dongkyunahn-intel · 2022-03-24T23:23:04Z

/verify

dongkyunahn-intel · 2022-03-25T18:58:07Z

CI fails due to unexpected pass from opencl. There is a pending PR for fixing this in intel/llvm - intel/llvm-test-suite#944.

kbobrovs · 2022-03-25T21:52:19Z

The only failure is unrelated to the changes:
Unexpectedly Passed Tests (1):
SYCL :: KernelAndProgram/undefined-symbol.cpp

dongkyunahn-intel added 2 commits March 3, 2022 15:01

[SYCL][ESIMD][EMU] Handling intrinsic operations promoted to 4-byte e…

4bd07fe

…lement type - scatter_impl() and gather_impl() in memory.hpp promote argument/return vector to 4-byte elements - ESIMD_EMULATOR backend handles this promoted vectors

__SYCL_DEVICE_ONLY__ is removed from memory.hpp

858c5c6

dongkyunahn-intel requested a review from kbobrovs March 3, 2022 23:34

dongkyunahn-intel requested a review from a team as a code owner March 3, 2022 23:34