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[Driver][SYCL] Enable adding of default device triple for AOT #4150

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[Driver][SYCL] Enable adding of default device triple for AOT #4150

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13 changes: 13 additions & 0 deletions clang/include/clang/Driver/Driver.h
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Original file line number Diff line number Diff line change
Expand Up @@ -655,6 +655,11 @@ class Driver {
FPGAEmulationMode = IsEmulation;
}

/// For SYCL w/ AOT, we imply the default device triple (spir64) as well.
/// We need to keep track of this so any use of any generic target option
/// setting is only applied to the user specified triples.
mutable bool SYCLDefaultTripleSet = false;

/// Returns true if an offload static library is found.
bool checkForOffloadStaticLib(Compilation &C,
llvm::opt::DerivedArgList &Args) const;
Expand Down Expand Up @@ -714,6 +719,14 @@ class Driver {
/// FPGA Emulation. This is only used for SYCL offloading to FPGA device.
bool isFPGAEmulationMode() const { return FPGAEmulationMode; };

/// isSYCLDefaultTripleSet - The default SYCL triple (spir64) has been added
/// along with the user specified AOT triples.
bool isSYCLDefaultTripleSet() const { return SYCLDefaultTripleSet; };

void setSYCLDefaultTriple(bool IsDefaultSet) const {
SYCLDefaultTripleSet = IsDefaultSet;
}

/// addIntegrationFiles - Add the integration files that will be populated
/// by the device compilation and used by the host compile.
void addIntegrationFiles(StringRef IntHeaderName, StringRef IntFooterName,
Expand Down
3 changes: 3 additions & 0 deletions clang/include/clang/Driver/Options.td
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Expand Up @@ -2635,6 +2635,9 @@ def fsycl_host_compiler_options_EQ : Joined<["-"], "fsycl-host-compiler-options=
def fno_sycl_use_footer : Flag<["-"], "fno-sycl-use-footer">, Flags<[CoreOption]>,
HelpText<"Disable usage of the integration footer during SYCL enabled "
"compilations.">;
def fno_sycl_default_triple : Flag<["-"], "fno-sycl-default-triple">,
Flags<[CoreOption]>, HelpText<"Disable adding of the default (spir64) triple "
"when building for AOT targets.">;
def fsyntax_only : Flag<["-"], "fsyntax-only">,
Flags<[NoXarchOption,CoreOption,CC1Option,FC1Option]>, Group<Action_Group>;
def ftabstop_EQ : Joined<["-"], "ftabstop=">, Group<f_Group>;
Expand Down
40 changes: 36 additions & 4 deletions clang/lib/Driver/Driver.cpp
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Expand Up @@ -718,6 +718,24 @@ static bool isValidSYCLTriple(llvm::Triple T) {
return true;
}

static bool addSYCLDefaultTriple(Compilation &C,
SmallVectorImpl<llvm::Triple> &SYCLTriples) {
if (C.getArgs().hasArg(options::OPT_fno_sycl_default_triple))
return false;
for (const auto &SYCLTriple : SYCLTriples) {
if (SYCLTriple.getSubArch() == llvm::Triple::NoSubArch &&
SYCLTriple.isSPIR())
return false;
// If we encounter a known non-spir* target, do not add the default triple.
if (SYCLTriple.isNVPTX() || SYCLTriple.isAMDGCN())
return false;
}
// Add the default triple as it was not found.
llvm::Triple DefaultTriple = C.getDriver().MakeSYCLDeviceTriple("spir64");
SYCLTriples.push_back(DefaultTriple);
return true;
}

void Driver::CreateOffloadingDeviceToolChains(Compilation &C,
InputList &Inputs) {

Expand Down Expand Up @@ -919,8 +937,9 @@ void Driver::CreateOffloadingDeviceToolChains(Compilation &C,
// Make sure we don't have a duplicate triple.
auto Duplicate = FoundNormalizedTriples.find(NormalizedName);
if (Duplicate != FoundNormalizedTriples.end()) {
Diag(clang::diag::warn_drv_sycl_offload_target_duplicate)
<< Val << Duplicate->second;
if (!Duplicate->second.equals("spir64"))
Diag(clang::diag::warn_drv_sycl_offload_target_duplicate)
<< Val << Duplicate->second;
continue;
}

Expand All @@ -929,6 +948,13 @@ void Driver::CreateOffloadingDeviceToolChains(Compilation &C,
FoundNormalizedTriples[NormalizedName] = Val;
UniqueSYCLTriplesVec.push_back(TT);
}
// Scanned the triples. Add the default device triple if it wasn't
// specified by the user.
if (addSYCLDefaultTriple(C, UniqueSYCLTriplesVec)) {
// set variable that the default triple was added. We want to be
// sure that user set generic -Xs* options are not applied.
C.getDriver().setSYCLDefaultTriple(true);
}
} else
Diag(clang::diag::warn_drv_empty_joined_argument)
<< SYCLTargetsValues->getAsString(C.getInputArgs());
Expand Down Expand Up @@ -987,8 +1013,11 @@ void Driver::CreateOffloadingDeviceToolChains(Compilation &C,
else if (HasValidSYCLRuntime)
// Triple for -fintelfpga is spir64_fpga-unknown-unknown-sycldevice.
SYCLTargetArch = SYCLfpga ? "spir64_fpga" : "spir64";
if (!SYCLTargetArch.empty())
if (!SYCLTargetArch.empty()) {
UniqueSYCLTriplesVec.push_back(MakeSYCLDeviceTriple(SYCLTargetArch));
if (addSYCLDefaultTriple(C, UniqueSYCLTriplesVec))
C.getDriver().setSYCLDefaultTriple(true);
}
}
// We'll need to use the SYCL and host triples as the key into
// getOffloadingDeviceToolChain, because the device toolchains we're
Expand Down Expand Up @@ -1428,7 +1457,8 @@ Compilation *Driver::BuildCompilation(ArrayRef<const char *> ArgList) {
const ToolChain *TC = SYCLTCRange.first->second;
const toolchains::SYCLToolChain *SYCLTC =
static_cast<const toolchains::SYCLToolChain *>(TC);
SYCLTC->TranslateBackendTargetArgs(*TranslatedArgs, TargetArgs);
SYCLTC->TranslateBackendTargetArgs(SYCLTC->getTriple(), *TranslatedArgs,
TargetArgs);
for (StringRef ArgString : TargetArgs) {
if (ArgString.equals("-hardware") || ArgString.equals("-simulation")) {
setFPGAEmulationMode(false);
Expand Down Expand Up @@ -4666,6 +4696,7 @@ class OffloadingActionBuilder final {
if (TT.getSubArch() == llvm::Triple::SPIRSubArch_fpga)
SYCLfpgaTriple = true;
}
addSYCLDefaultTriple(C, SYCLTripleList);
}
if (SYCLAddTargets) {
for (StringRef Val : SYCLAddTargets->getValues()) {
Expand All @@ -4688,6 +4719,7 @@ class OffloadingActionBuilder final {
const char *SYCLTargetArch = SYCLfpga ? "spir64_fpga" : "spir64";
SYCLTripleList.push_back(
C.getDriver().MakeSYCLDeviceTriple(SYCLTargetArch));
addSYCLDefaultTriple(C, SYCLTripleList);
if (SYCLfpga)
SYCLfpgaTriple = true;
}
Expand Down
8 changes: 6 additions & 2 deletions clang/lib/Driver/ToolChains/Clang.cpp
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Expand Up @@ -8274,6 +8274,8 @@ void OffloadBundler::ConstructJobMultipleOutputs(
if (getToolChain().getTriple().getSubArch() ==
llvm::Triple::SPIRSubArch_fpga &&
Dep.DependentOffloadKind == Action::OFK_SYCL) {
if (J++)
Triples += ',';
llvm::Triple TT;
TT.setArchName(types::getTypeName(InputType));
TT.setVendorName("intel");
Expand All @@ -8284,6 +8286,8 @@ void OffloadBundler::ConstructJobMultipleOutputs(
} else if (getToolChain().getTriple().getSubArch() !=
llvm::Triple::SPIRSubArch_fpga &&
Dep.DependentOffloadKind == Action::OFK_Host) {
if (J++)
Triples += ',';
Triples += Action::GetOffloadKindName(Dep.DependentOffloadKind);
Triples += '-';
Triples += Dep.DependentToolChain->getTriple().normalize();
Expand Down Expand Up @@ -8442,10 +8446,10 @@ void OffloadWrapper::ConstructJob(Compilation &C, const JobAction &JA,
// Only store compile/link opts in the image descriptor for the SPIR-V
// target; AOT compilation has already been performed otherwise.
TC.AddImpliedTargetArgs(TT, TCArgs, BuildArgs);
TC.TranslateBackendTargetArgs(TCArgs, BuildArgs);
TC.TranslateBackendTargetArgs(TT, TCArgs, BuildArgs);
createArgString("-compile-opts=");
BuildArgs.clear();
TC.TranslateLinkerTargetArgs(TCArgs, BuildArgs);
TC.TranslateLinkerTargetArgs(TT, TCArgs, BuildArgs);
createArgString("-link-opts=");
}

Expand Down
41 changes: 30 additions & 11 deletions clang/lib/Driver/ToolChains/SYCL.cpp
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Expand Up @@ -387,8 +387,8 @@ void SYCL::fpga::BackendCompiler::constructOpenCLAOTCommand(
llvm::Triple CPUTriple("spir64_x86_64");
TC.AddImpliedTargetArgs(CPUTriple, Args, CmdArgs);
// Add the target args passed in
TC.TranslateBackendTargetArgs(Args, CmdArgs);
TC.TranslateLinkerTargetArgs(Args, CmdArgs);
TC.TranslateBackendTargetArgs(CPUTriple, Args, CmdArgs);
TC.TranslateLinkerTargetArgs(CPUTriple, Args, CmdArgs);

SmallString<128> ExecPath(
getToolChain().GetProgramPath(makeExeName(C, "opencl-aot")));
Expand All @@ -414,7 +414,7 @@ void SYCL::fpga::BackendCompiler::ConstructJob(
const toolchains::SYCLToolChain &TC =
static_cast<const toolchains::SYCLToolChain &>(getToolChain());
ArgStringList TargetArgs;
TC.TranslateBackendTargetArgs(Args, TargetArgs);
TC.TranslateBackendTargetArgs(TC.getTriple(), Args, TargetArgs);

// When performing emulation compilations for FPGA AOT, we want to use
// opencl-aot instead of aoc.
Expand Down Expand Up @@ -534,8 +534,8 @@ void SYCL::fpga::BackendCompiler::ConstructJob(
TC.AddImpliedTargetArgs(getToolChain().getTriple(), Args, CmdArgs);

// Add -Xsycl-target* options.
TC.TranslateBackendTargetArgs(Args, CmdArgs);
TC.TranslateLinkerTargetArgs(Args, CmdArgs);
TC.TranslateBackendTargetArgs(getToolChain().getTriple(), Args, CmdArgs);
TC.TranslateLinkerTargetArgs(getToolChain().getTriple(), Args, CmdArgs);

// Look for -reuse-exe=XX option
if (Arg *A = Args.getLastArg(options::OPT_reuse_exe_EQ)) {
Expand Down Expand Up @@ -581,8 +581,8 @@ void SYCL::gen::BackendCompiler::ConstructJob(Compilation &C,
const toolchains::SYCLToolChain &TC =
static_cast<const toolchains::SYCLToolChain &>(getToolChain());
TC.AddImpliedTargetArgs(getToolChain().getTriple(), Args, CmdArgs);
TC.TranslateBackendTargetArgs(Args, CmdArgs);
TC.TranslateLinkerTargetArgs(Args, CmdArgs);
TC.TranslateBackendTargetArgs(getToolChain().getTriple(), Args, CmdArgs);
TC.TranslateLinkerTargetArgs(getToolChain().getTriple(), Args, CmdArgs);
SmallString<128> ExecPath(
getToolChain().GetProgramPath(makeExeName(C, "ocloc")));
const char *Exec = C.getArgs().MakeArgString(ExecPath);
Expand Down Expand Up @@ -614,8 +614,8 @@ void SYCL::x86_64::BackendCompiler::ConstructJob(
static_cast<const toolchains::SYCLToolChain &>(getToolChain());

TC.AddImpliedTargetArgs(getToolChain().getTriple(), Args, CmdArgs);
TC.TranslateBackendTargetArgs(Args, CmdArgs);
TC.TranslateLinkerTargetArgs(Args, CmdArgs);
TC.TranslateBackendTargetArgs(getToolChain().getTriple(), Args, CmdArgs);
TC.TranslateLinkerTargetArgs(getToolChain().getTriple(), Args, CmdArgs);
SmallString<128> ExecPath(
getToolChain().GetProgramPath(makeExeName(C, "opencl-aot")));
const char *Exec = C.getArgs().MakeArgString(ExecPath);
Expand Down Expand Up @@ -765,7 +765,8 @@ void SYCLToolChain::AddImpliedTargetArgs(
}

void SYCLToolChain::TranslateBackendTargetArgs(
const llvm::opt::ArgList &Args, llvm::opt::ArgStringList &CmdArgs) const {
const llvm::Triple &Triple, const llvm::opt::ArgList &Args,
llvm::opt::ArgStringList &CmdArgs) const {
// Handle -Xs flags.
for (auto *A : Args) {
// When parsing the target args, the -Xs<opt> type option applies to all
Expand All @@ -775,6 +776,15 @@ void SYCLToolChain::TranslateBackendTargetArgs(
// -Xs "-DFOO -DBAR"
// -XsDFOO -XsDBAR
// All of the above examples will pass -DFOO -DBAR to the backend compiler.

// Do not add the -Xs to the default SYCL triple (spir64) when we have
// implied the setting along with AOT compilations.
if ((A->getOption().matches(options::OPT_Xs) ||
A->getOption().matches(options::OPT_Xs_separate)) &&
Triple.getSubArch() == llvm::Triple::NoSubArch && Triple.isSPIR() &&
getDriver().isSYCLDefaultTripleSet())
continue;

if (A->getOption().matches(options::OPT_Xs)) {
// Take the arg and create an option out of it.
CmdArgs.push_back(Args.MakeArgString(Twine("-") + A->getValue()));
Expand All @@ -788,13 +798,22 @@ void SYCLToolChain::TranslateBackendTargetArgs(
continue;
}
}
// Do not process -Xsycl-target-backend for implied spir64 for AOT.
if (Triple.getSubArch() == llvm::Triple::NoSubArch && Triple.isSPIR() &&
getDriver().isSYCLDefaultTripleSet())
return;
// Handle -Xsycl-target-backend.
TranslateTargetOpt(Args, CmdArgs, options::OPT_Xsycl_backend,
options::OPT_Xsycl_backend_EQ);
}

void SYCLToolChain::TranslateLinkerTargetArgs(
const llvm::opt::ArgList &Args, llvm::opt::ArgStringList &CmdArgs) const {
const llvm::Triple &Triple, const llvm::opt::ArgList &Args,
llvm::opt::ArgStringList &CmdArgs) const {
// Do not process -Xsycl-target-linker for implied spir64 for AOT.
if (Triple.getSubArch() == llvm::Triple::NoSubArch && Triple.isSPIR() &&
getDriver().isSYCLDefaultTripleSet())
return;
// Handle -Xsycl-target-linker.
TranslateTargetOpt(Args, CmdArgs, options::OPT_Xsycl_linker,
options::OPT_Xsycl_linker_EQ);
Expand Down
10 changes: 6 additions & 4 deletions clang/lib/Driver/ToolChains/SYCL.h
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Expand Up @@ -151,10 +151,12 @@ class LLVM_LIBRARY_VISIBILITY SYCLToolChain : public ToolChain {
void AddImpliedTargetArgs(const llvm::Triple &Triple,
const llvm::opt::ArgList &Args,
llvm::opt::ArgStringList &CmdArgs) const;
void TranslateBackendTargetArgs(const llvm::opt::ArgList &Args,
llvm::opt::ArgStringList &CmdArgs) const;
void TranslateLinkerTargetArgs(const llvm::opt::ArgList &Args,
llvm::opt::ArgStringList &CmdArgs) const;
void TranslateBackendTargetArgs(const llvm::Triple &Triple,
const llvm::opt::ArgList &Args,
llvm::opt::ArgStringList &CmdArgs) const;
void TranslateLinkerTargetArgs(const llvm::Triple &Triple,
const llvm::opt::ArgList &Args,
llvm::opt::ArgStringList &CmdArgs) const;

bool useIntegratedAs() const override { return true; }
bool isPICDefault() const override { return false; }
Expand Down
8 changes: 4 additions & 4 deletions clang/test/Driver/sycl-intelfpga-aoco-win.cpp
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Expand Up @@ -7,9 +7,9 @@
// RUN: clang-offload-wrapper -o %t-aoco.bc -host=x86_64-pc-windows-msvc -kind=sycl -target=fpga_aoco-intel-unknown-sycldevice %t.aoco
// RUN: llc -filetype=obj -o %t-aoco.o %t-aoco.bc
// RUN: llvm-ar crv %t_aoco.a %t.o %t2.o %t-aoco.o
// RUN: %clang_cl --target=x86_64-pc-windows-msvc -fsycl -fno-sycl-device-lib=all -fintelfpga -Xshardware %t_aoco.a %s -ccc-print-phases 2>&1 \
// RUN: %clang_cl --target=x86_64-pc-windows-msvc -fsycl -fno-sycl-default-triple -fno-sycl-device-lib=all -fintelfpga -Xshardware %t_aoco.a %s -ccc-print-phases 2>&1 \
// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCO-PHASES-WIN %s
// RUN: %clangxx -target x86_64-pc-windows-msvc -fsycl -fno-sycl-device-lib=all -fintelfpga -Xshardware %t_aoco.a %s -ccc-print-phases 2>&1 \
// RUN: %clangxx -target x86_64-pc-windows-msvc -fsycl -fno-sycl-default-triple -fno-sycl-device-lib=all -fintelfpga -Xshardware %t_aoco.a %s -ccc-print-phases 2>&1 \
// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCO-PHASES-WIN %s
// CHK-FPGA-AOCO-PHASES-WIN: 0: input, "[[INPUTA:.+\.a]]", object, (host-sycl)
// CHK-FPGA-AOCO-PHASES-WIN: 1: input, "[[INPUTSRC:.+\.cpp]]", c++, (host-sycl)
Expand Down Expand Up @@ -41,9 +41,9 @@
// CHK-FPGA-AOCO-PHASES-WIN: 27: offload, "host-sycl (x86_64-pc-windows-msvc)" {11}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {26}, image

/// aoco test, checking tools
// RUN: %clang_cl --target=x86_64-pc-windows-msvc -fsycl -fno-sycl-device-lib=all -fintelfpga %t_aoco.a -Xshardware -### %s 2>&1 \
// RUN: %clang_cl --target=x86_64-pc-windows-msvc -fsycl -fno-sycl-default-triple -fno-sycl-device-lib=all -fintelfpga %t_aoco.a -Xshardware -### %s 2>&1 \
// RUN: | FileCheck -check-prefix=CHK-FPGA-AOCO %s
// RUN: %clang_cl --target=x86_64-pc-windows-msvc -fsycl -fno-sycl-device-lib=all -fintelfpga %t_aoco.a -Xshardware -### %s 2>&1 \
// RUN: %clang_cl --target=x86_64-pc-windows-msvc -fsycl -fno-sycl-default-triple -fno-sycl-device-lib=all -fintelfpga %t_aoco.a -Xshardware -### %s 2>&1 \
// RUN: | FileCheck -check-prefix=CHK-FPGA-AOCO %s
// CHK-FPGA-AOCO: clang-offload-bundler{{.*}} "-type=a" "-targets=sycl-spir64_fpga-unknown-unknown-sycldevice" "-inputs=[[INPUTLIB:.+\.a]]" "-outputs=[[OUTLIB:.+\.a]]" "-unbundle"
// CHK-FPGA-AOCO: llvm-link{{.*}} "[[OUTLIB]]" "-o" "[[LINKEDBC:.+\.bc]]"
Expand Down
14 changes: 7 additions & 7 deletions clang/test/Driver/sycl-intelfpga-aoco.cpp
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Expand Up @@ -13,7 +13,7 @@
// RUN: llc -filetype=obj -o %t-aoco_cl.o %t-aoco_cl.bc
// RUN: llvm-ar crv %t_aoco.a %t.o %t2.o %t-aoco.o
// RUN: llvm-ar crv %t_aoco_cl.a %t.o %t2_cl.o %t-aoco_cl.o
// RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fno-sycl-device-lib=all -fintelfpga -Xshardware %t_aoco.a %s -ccc-print-phases 2>&1 \
// RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fno-sycl-default-triple -fno-sycl-device-lib=all -fintelfpga -Xshardware %t_aoco.a %s -ccc-print-phases 2>&1 \
// RUN: | FileCheck -check-prefix=CHK-FPGA-AOCO-PHASES %s
// CHK-FPGA-AOCO-PHASES: 0: input, "[[INPUTA:.+\.a]]", object, (host-sycl)
// CHK-FPGA-AOCO-PHASES: 1: input, "[[INPUTCPP:.+\.cpp]]", c++, (host-sycl)
Expand Down Expand Up @@ -45,13 +45,13 @@
// CHK-FPGA-AOCO-PHASES: 27: offload, "host-sycl (x86_64-unknown-linux-gnu)" {11}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {26}, image

/// aoco test, checking tools
// RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fno-sycl-device-lib=all -fintelfpga -Xshardware -foffload-static-lib=%t_aoco.a -### %s 2>&1 \
// RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fno-sycl-default-triple -fno-sycl-device-lib=all -fintelfpga -Xshardware -foffload-static-lib=%t_aoco.a -### %s 2>&1 \
// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCO,CHK-FPGA-AOCO-LIN %s
// RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fno-sycl-device-lib=all -fintelfpga -Xshardware %t_aoco.a -### %s 2>&1 \
// RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fno-sycl-default-triple -fno-sycl-device-lib=all -fintelfpga -Xshardware %t_aoco.a -### %s 2>&1 \
// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCO,CHK-FPGA-AOCO-LIN %s
// RUN: %clang_cl -fsycl -fno-sycl-device-lib=all -fintelfpga -Xshardware -foffload-static-lib=%t_aoco_cl.a -### %s 2>&1 \
// RUN: %clang_cl -fsycl -fno-sycl-default-triple -fno-sycl-device-lib=all -fintelfpga -Xshardware -foffload-static-lib=%t_aoco_cl.a -### %s 2>&1 \
// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCO,CHK-FPGA-AOCO-WIN %s
// RUN: %clang_cl -fsycl -fno-sycl-device-lib=all -fintelfpga -Xshardware %t_aoco_cl.a -### %s 2>&1 \
// RUN: %clang_cl -fsycl -fno-sycl-default-triple -fno-sycl-device-lib=all -fintelfpga -Xshardware %t_aoco_cl.a -### %s 2>&1 \
// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCO,CHK-FPGA-AOCO-WIN %s
// CHK-FPGA-AOCO: clang-offload-bundler{{.*}} "-type=a" "-targets=sycl-spir64_fpga-unknown-unknown-sycldevice" "-inputs=[[INPUTLIB:.+\.a]]" "-outputs=[[OUTLIB:.+\.a]]" "-unbundle"
// CHK-FPGA-AOCO: llvm-link{{.*}} "[[OUTLIB]]" "-o" "[[LINKEDBC:.+\.bc]]"
Expand All @@ -68,7 +68,7 @@
// CHK-FPGA-AOCO-WIN: link.exe{{.*}} "{{.*}}[[INPUTLIB]]" {{.*}} "[[FINALOBJW]]"

/// aoco archive check with emulation
// RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fno-sycl-device-lib=all -fintelfpga %t_aoco.a %s -ccc-print-phases 2>&1 \
// RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fno-sycl-default-triple -fno-sycl-device-lib=all -fintelfpga %t_aoco.a %s -ccc-print-phases 2>&1 \
// RUN: | FileCheck -check-prefix=CHK-FPGA-AOCO-PHASES-EMU %s
// CHK-FPGA-AOCO-PHASES-EMU: 0: input, "[[INPUTA:.+\.a]]", object, (host-sycl)
// CHK-FPGA-AOCO-PHASES-EMU: 1: input, "[[INPUTCPP:.+\.cpp]]", c++, (host-sycl)
Expand Down Expand Up @@ -102,7 +102,7 @@
// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCO-EMU,CHK-FPGA-AOCO-EMU-LIN %s
// RUN: %clang_cl -fsycl -fno-sycl-device-lib=all -fintelfpga %t_aoco_cl.a -### %s 2>&1 \
// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCO-EMU,CHK-FPGA-AOCO-EMU-WIN %s
// CHK-FPGA-AOCO-EMU: clang-offload-bundler{{.*}} "-type=a" "-targets=sycl-spir64_fpga-unknown-unknown-sycldevice" "-inputs=[[INPUTLIB:.+\.a]]" "-outputs=[[OUTLIB:.+\.a]]" "-unbundle"
// CHK-FPGA-AOCO-EMU: clang-offload-bundler{{.*}} "-type=a" "-targets=sycl-spir64_fpga-unknown-unknown-sycldevice,{{.*}}" "-inputs=[[INPUTLIB:.+\.a]]" "-outputs=[[OUTLIB:.+\.a]],{{.*.a}}" "-unbundle"
// CHK-FPGA-AOCO-EMU: llvm-link{{.*}} "[[OUTLIB]]" "-o" "[[LINKEDBC:.+\.bc]]"
// CHK-FPGA-AOCO-EMU: sycl-post-link{{.*}} "-split-esimd"{{.*}} "-O2" "-spec-const=default" "-o" "[[SPLTABLE:.+\.table]]" "[[LINKEDBC]]"
// CHK-FPGA-AOCO-EMU: file-table-tform{{.*}} "-o" "[[TABLEOUT:.+\.txt]]" "[[SPLTABLE]]"
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