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[SYCL][L0] Proposal for new device descriptors for Intel GPU devices #2806
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An internal team at Intel has requested a new device descriptors to provide access to low-level details about Intel GPU devices. This proposal details what is required to provide this information as a SYCL extension. Signed-off-by: Gail Lyons <gail.lyons@intel.com>
Signed-off-by: Gail Lyons <gail.lyons@intel.com>
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Does it need to be so much specific to "Intel GPU"?
Is there a process defined that can be used to make it more generic later, if other backends/devices decide to support this?
We can always rev the specification in the future, but atm only Intel GPUs define "EU"s. |
Signed-off-by: Gail Lyons <gail.lyons@intel.com>
How about PCI address? Doesn't it apply to all PCI devices? Unfortunately, only the Level Zero backend provides the PCI address today. |
Signed-off-by: Gail Lyons <gail.lyons@intel.com>
That's fine. The feature main remain unsupported by other backends, but I am suggesting that it should not be called "Intel GPU" feature from the beginning. |
Are you just concerned about the title and description of the extension? (E.g. the title is currently "New device descriptors for Intel GPUs".) I presume we could change these in the future if we add support for non-Intel GPUs. Note that the "intel" in the feature test macro ( We might, however, consider dropping the "gpu" from the PCI APIs. For example, |
Yes, that's what I wanted. I think someone mentioned OpenCL support for PCI is coming too, so I assume more than GPU would be covered then already. |
I can remove the "gpu" from the PCI address device descriptor and aspect. Should I add a separate Feature Test Macro for the PCI address? Something like SYCL_EXT_INTEL_DEVICE_INFO? SYCL_EXT_INTEL_GPU_DEVICE_INFO still seems appropriate for the EU count and the EU SIMD width. |
I'd think so, yes. These are independent features traveling by themselves. |
Signed-off-by: Gail Lyons <gail.lyons@intel.com>
Personally, I think we could still call this all one "feature", rather than breaking the PCI address into a separate feature, but I admit this is a matter of taste. If we do want this to be two features, we should have two documents. So, the only change I suggest is to break the PCI address query out into its own document named something like "IntelDeviceInfo.md". |
I'd be OK with single feature for all device info extension. |
Great! In that case, keep a single document, move the feature test macro back to the top of the document, and name the feature test macro "SYCL_EXT_INTEL_DEVICE_INFO". |
Additional low-level information will be provided for Intel GPUs using the Level Zero backend: - Number of slices - Number of subslices in a slice - Number of EUs in a subslice - Maximum memory bandwidth Signed-off-by: Gail Lyons <gail.lyons@intel.com>
Signed-off-by: Gail Lyons <gail.lyons@intel.com>
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# Intel GPU PCI Address # |
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This should not be "Intel GPU" now. Please also review other instances of "Intel GPU" in this document.
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Just for PCI address? With the exception of maybe "memory bandwidth", the rest are extremely Intel GPU specific.
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Done! I made both PCI address and max memory bandwidth more generic.
Signed-off-by: Gail Lyons <gail.lyons@intel.com>
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# SYCL(TM) Proposal: New device descriptors for Intel GPUs |
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can we not call it all "Intel GPU" extensions, but just Intel's extension for device info (which SYCL_EXT_INTEL_DEVICE_INFO
feature test macro already says)?
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Sure!
Signed-off-by: Gail Lyons <gail.lyons@intel.com>
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LGTM!
This proposal details what is required to expose some low-level details of hardware devices as a SYCL extension.
Signed-off-by: Gail Lyons gail.lyons@intel.com