Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

[Driver][SYCL][FPGA] Improve expected triple and link behaviors for A… #1549

Merged
merged 7 commits into from
Apr 21, 2020
Merged

[Driver][SYCL][FPGA] Improve expected triple and link behaviors for A… #1549

Show file tree
Hide file tree
Changes from 1 commit
Commits
Show all changes
7 commits
Select commit Hold shift + click to select a range
c23a03e
[Driver][SYCL][FPGA] Improve expected triple and link behaviors for A…
mdtoguchi Apr 18, 2020
e3a9200
[NFC] Update AOCX tests to improve shared source usage
mdtoguchi Apr 20, 2020
7a5cfd2
[NFC] Adjust test to use assertion
mdtoguchi Apr 20, 2020
d720fa4
[SYCL][Driver][FPGA] When unbundling aocx, match up the appropriate t…
mdtoguchi Apr 20, 2020
e2808b0
[NFC] Additional test updates to split out -coff and non-coff checks.
mdtoguchi Apr 20, 2020
1d7bce5
[NFC] Update test to check that no additional unbundle is done agains…
mdtoguchi Apr 20, 2020
813ebcb
Apply review suggestions for timezone's sake
AGindinson Apr 21, 2020
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
Next Next commit
[Driver][SYCL][FPGA] Improve expected triple and link behaviors for A… 
…OCX files

When performing -fsycl-link=image behaviors on Windows, there was a mismatch
of triples being used when checking for existence of the AOCX binary.  This
caused a problem when using clang-cl as the triples do not properly match.
We also do not want to do any additional unbundling of any AOCX archive, which
was causing a conflict of expected FPGA archives.

Signed-off-by: Michael D Toguchi <michael.d.toguchi@intel.com>
  • Loading branch information
@mdtoguchi
mdtoguchi committed Apr 18, 2020
commit c23a03e8f39bfe0f0b2244cdeedece372f513d86
10 changes: 10 additions & 0 deletions clang/lib/Driver/Driver.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -2534,12 +2534,18 @@ static bool runBundler(const SmallVectorImpl<StringRef> &BundlerArgs,

bool hasFPGABinary(Compilation &C, std::string Object, types::ID Type) {
assert(types::isFPGA(Type) && "unexpected Type for FPGA binary check");
// Do not do the check if the file doesn't exist
if (!llvm::sys::fs::exists(Object))
return false;

// Temporary names for the output.
llvm::Triple TT;
TT.setArchName(types::getTypeName(Type));
TT.setVendorName("intel");
TT.setOS(llvm::Triple::UnknownOS);
TT.setEnvironment(llvm::Triple::SYCLDevice);
if (C.getDriver().IsCLMode())
TT.setObjectFormat(llvm::Triple::COFF);

// Checking uses -check-section option with the input file, no output
// file and the target triple being looked for.
Expand Down Expand Up @@ -4794,6 +4800,10 @@ void Driver::BuildActions(Compilation &C, DerivedArgList &Args,
// archive unbundling for Windows.
if (!isStaticArchiveFile(LA))
continue;
// FPGA AOCX files are archives, but we do not want to unbundle them here
// as they have already been unbundled and processed for linking.
if (hasFPGABinary(C, LA.str(), types::TY_FPGA_AOCX))
continue;
AGindinson marked this conversation as resolved.
Show resolved Hide resolved
// In MSVC environment offload-static-libs are handled slightly different
// because of missing support for partial linking in the linker. We add an
// unbundling action for each static archive which produces list files with
Expand Down
21 changes: 13 additions & 8 deletions clang/test/Driver/sycl-offload-intelfpga.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -126,9 +126,12 @@
// RUN: clang-offload-wrapper -o %t-aocx.bc -host=x86_64-unknown-linux-gnu -kind=sycl -target=fpga_aocx-intel-unknown-sycldevice %t.aocx
// RUN: llc -filetype=obj -o %t-aocx.o %t-aocx.bc
// RUN: llvm-ar crv %t_aocx.a %t.o %t-aocx.o
// RUN: clang-offload-wrapper -o %t-aocx_cl.bc -host=x86_64-unknown-linux-gnu -kind=sycl -target=fpga_aocx-intel-unknown-sycldevice-coff %t.aocx
// RUN: llc -filetype=obj -o %t-aocx_cl.o %t-aocx_cl.bc
// RUN: llvm-ar crv %t_aocx_cl.a %t.o %t-aocx_cl.o
// RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fintelfpga %t_aocx.a -ccc-print-phases 2>&1 \
// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCX-PHASES %s
// RUN: %clang_cl -fsycl -fintelfpga %t_aocx.a -ccc-print-phases 2>&1 \
// RUN: %clang_cl -fsycl -fintelfpga %t_aocx_cl.a -ccc-print-phases 2>&1 \
AGindinson marked this conversation as resolved.
Show resolved Hide resolved
// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCX-PHASES %s
// CHK-FPGA-AOCX-PHASES: 0: input, "{{.*}}", fpga_aocx, (host-sycl)
// CHK-FPGA-AOCX-PHASES: 1: linker, {0}, image, (host-sycl)
Expand All @@ -138,9 +141,9 @@

// RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fintelfpga %t_aocx.a -### 2>&1 \
// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCX,CHK-FPGA-AOCX-LIN %s
// RUN: %clang_cl -fsycl -fintelfpga %t_aocx.a -### 2>&1 \
// RUN: %clang_cl -fsycl -fintelfpga %t_aocx_cl.a -### 2>&1 \
// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCX,CHK-FPGA-AOCX-WIN %s
// CHK-FPGA-AOCX: clang-offload-bundler{{.*}} "-type=ao" "-targets=sycl-fpga_aocx-intel-unknown-sycldevice" "-inputs=[[LIBINPUT:.+\.a]]" "-outputs=[[BUNDLEOUT:.+\.aocx]]" "-unbundle"
// CHK-FPGA-AOCX: clang-offload-bundler{{.*}} "-type=ao" "-targets=sycl-fpga_aocx-intel-unknown-sycldevice{{(-coff)?}}" "-inputs=[[LIBINPUT:.+\.a]]" "-outputs=[[BUNDLEOUT:.+\.aocx]]" "-unbundle"
AGindinson marked this conversation as resolved.
Show resolved Hide resolved
// CHK-FPGA-AOCX: clang-offload-wrapper{{.*}} "-o=[[WRAPOUT:.+\.bc]]" {{.*}} "-target=spir64_fpga" "-kind=sycl" "[[BUNDLEOUT]]"
// CHK-FPGA-AOCX-LIN: llc{{.*}} "-filetype=obj" "-o" "[[LLCOUT:.+\.o]]" "[[WRAPOUT]]"
// CHK-FPGA-AOCX-WIN: llc{{.*}} "-filetype=obj" "-o" "[[LLCOUT2:.+\.obj]]" "[[WRAPOUT]]"
Expand All @@ -150,9 +153,9 @@
/// AOCX with source
// RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fintelfpga %s %t_aocx.a -### 2>&1 \
// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCX-SRC,CHK-FPGA-AOCX-SRC-LIN %s
// RUN: %clang_cl -fsycl -fintelfpga %s %t_aocx.a -### 2>&1 \
// RUN: %clang_cl -fsycl -fintelfpga %s %t_aocx_cl.a -### 2>&1 \
// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCX-SRC,CHK-FPGA-AOCX-SRC-WIN %s
// CHK-FPGA-AOCX-SRC: clang-offload-bundler{{.*}} "-type=ao" "-targets=sycl-fpga_aocx-intel-unknown-sycldevice" "-inputs=[[LIBINPUT:.+\.a]]" "-outputs=[[BUNDLEOUT:.+\.aocx]]" "-unbundle"
// CHK-FPGA-AOCX-SRC: clang-offload-bundler{{.*}} "-type=ao" "-targets=sycl-fpga_aocx-intel-unknown-sycldevice{{(-coff)?}}" "-inputs=[[LIBINPUT:.+\.a]]" "-outputs=[[BUNDLEOUT:.+\.aocx]]" "-unbundle"
// CHK-FPGA-AOCX-SRC: clang-offload-wrapper{{.*}} "-o=[[WRAPOUT:.+\.bc]]" {{.*}} "-target=spir64_fpga" "-kind=sycl" "[[BUNDLEOUT]]"
// CHK-FPGA-AOCX-SRC: llc{{.*}} "-filetype=obj" "-o" "[[LLCOUT:.+\.(o|obj)]]" "[[WRAPOUT]]"
// CHK-FPGA-AOCX-SRC: clang{{.*}} "-cc1" {{.*}} "-fsycl-is-device" {{.*}} "-o" "[[DEVICEBC:.+\.bc]]"
Expand All @@ -168,9 +171,9 @@
// RUN: touch %t.o
// RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fintelfpga %t.o %t_aocx.a -### 2>&1 \
// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCX-OBJ,CHK-FPGA-AOCX-OBJ-LIN %s
// RUN: %clang_cl -fsycl -fintelfpga %t.o %t_aocx.a -### 2>&1 \
// RUN: %clang_cl -fsycl -fintelfpga %t.o %t_aocx_cl.a -### 2>&1 \
// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCX-OBJ,CHK-FPGA-AOCX-OBJ-WIN %s
// CHK-FPGA-AOCX-OBJ: clang-offload-bundler{{.*}} "-type=ao" "-targets=sycl-fpga_aocx-intel-unknown-sycldevice" "-inputs=[[LIBINPUT:.+\.a]]" "-outputs=[[BUNDLEOUT:.+\.aocx]]" "-unbundle"
// CHK-FPGA-AOCX-OBJ: clang-offload-bundler{{.*}} "-type=ao" "-targets=sycl-fpga_aocx-intel-unknown-sycldevice{{(-coff)?}}" "-inputs=[[LIBINPUT:.+\.a]]" "-outputs=[[BUNDLEOUT:.+\.aocx]]" "-unbundle"
// CHK-FPGA-AOCX-OBJ: clang-offload-wrapper{{.*}} "-o=[[WRAPOUT:.+\.bc]]" {{.*}} "-target=spir64_fpga" "-kind=sycl" "[[BUNDLEOUT]]"
// CHK-FPGA-AOCX-OBJ: llc{{.*}} "-filetype=obj" "-o" "[[LLCOUT:.+\.(o|obj)]]" "[[WRAPOUT]]"
// CHK-FPGA-AOCX-OBJ: clang-offload-bundler{{.*}} "-type=o" {{.*}} "-outputs=[[HOSTOBJ:.+\.(o|obj)]],[[DEVICEOBJ:.+\.(o|obj)]]" "-unbundle"
Expand Down Expand Up @@ -332,8 +335,10 @@
// RUN: %clang_cl -fsycl -c -o %t2_cl.o %t2.c
// RUN: clang-offload-wrapper -o %t-aoco.bc -host=x86_64-unknown-linux-gnu -kind=sycl -target=fpga_aoco-intel-unknown-sycldevice %t.aoco
// RUN: llc -filetype=obj -o %t-aoco.o %t-aoco.bc
// RUN: clang-offload-wrapper -o %t-aoco_cl.bc -host=x86_64-unknown-linux-gnu -kind=sycl -target=fpga_aoco-intel-unknown-sycldevice-coff %t.aoco
// RUN: llc -filetype=obj -o %t-aoco_cl.o %t-aoco_cl.bc
// RUN: llvm-ar crv %t_aoco.a %t.o %t2.o %t-aoco.o
// RUN: llvm-ar crv %t_aoco_cl.a %t.o %t2_cl.o %t-aoco.o
// RUN: llvm-ar crv %t_aoco_cl.a %t.o %t2_cl.o %t-aoco_cl.o
// RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fintelfpga -foffload-static-lib=%t_aoco.a %s -### -ccc-print-phases 2>&1 \
// RUN: | FileCheck -check-prefix=CHK-FPGA-AOCO-PHASES %s
// CHK-FPGA-AOCO-PHASES: 0: input, "[[INPUTA:.+\.a]]", object, (host-sycl)
Expand Down
60 changes: 60 additions & 0 deletions sycl/test/fpga_tests/fpga_aocx_win.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -0,0 +1,60 @@
//==--- fpga_aocx_win.cpp - AOT compilation for fpga using aoc with aocx ---==//
AGindinson marked this conversation as resolved.
Show resolved Hide resolved
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//

// REQUIRES: aoc, accelerator
// REQUIRES: system-windows

/// E2E test for AOCX creation/use/run for FPGA
// Produce an archive with device (AOCX) image
// RUN: %clang_cl -fsycl -fintelfpga -fsycl-link=image -DDEVICE_PART %s -o %t_image_cl.a
// Produce a host object
// RUN: %clang_cl -fsycl -fintelfpga -DHOST_PART %s -c -o %t.o

// AOCX with source
// RUN: %clang_cl -fsycl -fintelfpga -DHOST_PART %s %t_image_cl.a -o %t_aocx_src.out
// AOCX with object
// RUN: %clang_cl -fsycl -fintelfpga %t.o %t_image_cl.a -o %t_aocx_obj.out
//
// RUN: env SYCL_DEVICE_TYPE=ACC %t_aocx_src.out
// RUN: env SYCL_DEVICE_TYPE=ACC %t_aocx_obj.out

#include "CL/sycl.hpp"
#include <iostream>

using namespace cl::sycl;

#ifdef DEVICE_PART

const double big[] = {3, 2, 1, 5, 6, 7};
void foo(double &result, queue q, int x) {
buffer<double> buf(&result, 1);
buffer<double, 1> big_buf(big, sizeof(big) / sizeof(double));
q.submit([&](handler &cgh) {
auto acc = buf.get_access<access::mode::discard_write>(cgh);
auto big_acc = big_buf.get_access<access::mode::read>(cgh);
cgh.single_task<class test>([=]() {
acc[0] = big_acc[x];
});
});
}

#endif // DEVICE_PART

#ifdef HOST_PART

void foo(double &, queue q, int x);

int main(void) {
queue q(accelerator_selector{});

double result;
foo(result, q, 3);
std::cout << "Result: " << result << "\n";
AGindinson marked this conversation as resolved.
Show resolved Hide resolved
}

#endif // HOST_PART