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2c2d291
[concepts] Extract function template pack arguments from the current …
zyn0217 Feb 6, 2024
62838b8
[mlir][test] Fix -Wformat in sparse_tensor.c (NFC)
DamonFool Feb 6, 2024
8f80df0
[Github] Use building LLVM as perf-training for CI container (#80713)
boomanaiden154 Feb 6, 2024
5953532
[lldb] Add QSupported key to report watchpoint types supported (#80376)
jasonmolenda Feb 6, 2024
87ff65b
[mlir][test] Fix -Wformat in sparse_tensor.c (NFC)
DamonFool Feb 6, 2024
c1ac2cf
Use a markdown list in Affine dialect docs
ftynse Feb 6, 2024
9a5fb74
[mlir][spirv] Handle a missing case when inlining spirv.ReturnValue (…
agentcooper Feb 6, 2024
d193ac4
[mlir][vector] Drop inner unit dims for xWrite on dynamic shapes. (#8…
hanhanW Feb 6, 2024
942cb24
[CodeGen][NewPM] Consolidate PASS_NAME and CONSTRUCTOR in MachinePass…
aeubanks Feb 6, 2024
617602d
[clang-format] Handle generic selections inside parentheses (#79785)
sstwcw Jan 29, 2024
1442b0e
[TableGen] Remove redundant buffer copies for ULEB128 decode calls. (…
nvjle Feb 6, 2024
fa70b5d
[Coroutines][NFC] Refactor CoroSplit for Switch Resume ABI (#80758)
yuxuanchen1997 Feb 6, 2024
397e91f
[MemProf][NFC] Compute SHADOW_ENTRY_SIZE from MEM_GRANULARITY and SHA…
Enna1 Feb 6, 2024
0716d31
[RISCV][NFC] Use maybe_unused instead of casting to void to fix unuse…
yetingk Feb 6, 2024
d53043f
[mlir][Bazel] Adjust BUILD.bazel according to 0d091206dd656c2a9d31d60…
akuegel Feb 6, 2024
7d055af
[mlir][Symbol] Add verification that symbol's parent is a SymbolTable…
caojoshua Feb 6, 2024
47a12cc
CoverageMapping.cpp: s/MaxBitmapID/MaxBitmapIdx/ in getMaxBitmapSize()
chapuni Feb 6, 2024
03881dc
[mlir][emitc] Add a `declare_func` operation (#80297)
marbre Feb 6, 2024
38476b0
[Github] Add script to count running jobs (#80250)
boomanaiden154 Feb 6, 2024
0b62218
Anonymize `MCDCRecordProcessor`
chapuni Feb 6, 2024
933247d
[SimplifyLibCalls] Merge sqrt into the power of exp (#79146)
asi-sc Feb 6, 2024
984dd15
[clang-format] Add MainIncludeChar option. (#78752)
j-jorge Feb 6, 2024
edfc21a
[OMPD] Runtime Entry Point functions for OMPD in libomp.so need C lin…
vigbalu Feb 6, 2024
42b5b72
AMDGPU/GlobalISel: Fix not running -global-isel in global isel test
arsenm Feb 6, 2024
0473e32
[mlir][ArmSME] Add rewrite to lift illegal vector.transposes to memor…
MacDue Feb 6, 2024
3eb1e6d
[libc] Move libc_errno inside of LIBC_NAMESPACE (#80774)
michaelrj-google Feb 6, 2024
6ec926d
[llvm-mca] Fix doc error
wangpc-pp Feb 6, 2024
168002e
[Tests][LoopDistribute] Fixes failing unit test (#80809)
nilanjana87 Feb 6, 2024
c9fd738
[CodeGen] Port DeadMachineInstructionElim to new pass manager (#80582)
paperchalice Feb 6, 2024
c6b5ea3
[Transforms] Expand optimizeTan to fold more inverse trig pairs (#77799)
AZero13 Feb 6, 2024
89c377d
Merge from 'sycl' to 'sycl-web'
Feb 6, 2024
35904ec
[AArch64] MI Scheduler STP combine (#80188)
sjoerdmeijer Feb 6, 2024
2f7d9ab
[mlir][ArmSME][nfc] Fix broken doc links to fmopa_2way op
c-rhodes Feb 6, 2024
bc569f6
[RISCV] Add test case for shufflevector that gets scalarized. NFC
lukel97 Feb 6, 2024
726cf60
[llvm-mca] Add an empty line to fix doc error
wangpc-pp Feb 6, 2024
292d9e8
[PowerPC] Mask constant operands in ValueBit tracking (#67653)
ecnelises Feb 6, 2024
6dfb31a
[clang][Interp][NFC] Simplify test case
tbaederr Feb 6, 2024
3d186a7
[Clang][AArch64] Fix some target guards and remove +sve from tests. (…
sdesmalen-arm Feb 6, 2024
c302909
[RemoveDIs] Fix DPValue hoisting in hoistSuccIdenticalTerminatorToSwi…
OCHyams Feb 6, 2024
603ca26
Merge from 'main' to 'sycl-web' (127 commits)
KseniyaTikhomirova Feb 6, 2024
7f292b8
[AArch64] Convert concat(uhadd(a,b), uhadd(c,d)) to uhadd(concat(a,c)…
Feb 6, 2024
8924a9f
[mlir][EmitC] Remove unreachable code and fix Windows build warning (…
Feb 6, 2024
de8ba2f
[CodeGen] Update comments for ValueType.td. [NFC] (#80670)
fpetrogalli Feb 6, 2024
82950a6
[clang][Interp] Protect ArrayElemPtr ops from dummy pointers
tbaederr Feb 6, 2024
ccc77f1
[clang][Interp][NFC] Fix comment typos
tbaederr Feb 6, 2024
cf94e00
[bazel] Add missing dependency for 0473e322f67228a9c2dbf462357e5b4a2b…
d0k Feb 6, 2024
b8cdc26
[DAG] visitCTPOP - if only the upper half of the ctpop operand is zer…
RKSimon Feb 6, 2024
29fa64f
[flang][OpenMP][NFC] Outline `genOpWithBody` & `createBodyOfOp` args …
ergawy Feb 6, 2024
2e3de99
[DAG] Generalize setcc(setcc) fold to use known bits.
davemgreen Feb 6, 2024
a2e5287
[llvm-readobj][Object][COFF] Print COFF import library symbol export …
cjacek Feb 6, 2024
a18e92d
[clang] Fix unexpected `-Wconstant-logical-operand` in C23 (#80724)
Fznamznon Feb 6, 2024
e686695
[flang][OpenMP] Accept firstprivate vars in copyprivate (#80467)
luporl Feb 6, 2024
48927e9
[flang][OpenMP] Fix privatization of threadprivate common block (#77821)
luporl Feb 6, 2024
b06568f
[FPEnv][llvm-reduce] Correct strictfp test.
kpneal Aug 11, 2023
026f3c1
[libc] Remove CPU dependent AMDGPU instructions (#80707)
jhuber6 Feb 6, 2024
ddc4935
[DebugInfo][RemoveDIs] Don't allocate one DPMarker per instruction (#…
jmorse Feb 6, 2024
54c29e0
[AArch64] Set predicates for FP/SIMD InstAliases (#79033)
ostannard Feb 6, 2024
26db3c3
[clang][Interp] Handle discarding ConstantExprs
tbaederr Feb 6, 2024
83eb812
[libc] Fix accidentally deleted braces after change
jhuber6 Feb 6, 2024
f89fe08
[Matrix] Convert column-vector ops feeding dot product to row-vectors…
fhahn Feb 6, 2024
ffd79b3
[LoopUnroll] Consider simplified operands while retrieving TTI instru…
skachkov-sc Feb 6, 2024
62c352e
[CLANG] Fix INF/NAN warning. (#80290)
zahiraam Feb 6, 2024
d5a3de4
[libc][stdbit] implement stdc_trailing_zeros (C23) (#80344)
nickdesaulniers Feb 6, 2024
ca1da36
[libc] add inttypes macros (#80726)
SchrodingerZhu Feb 6, 2024
364f781
[GlobalIsel] Combine logic of icmps (#77855)
tschuett Feb 6, 2024
b1acb7a
[XCOFF] Add compiler version to an auxiliary symbol table entry (#80162)
stephenpeckham Feb 6, 2024
d4c5aca
[ExecutionEngine] Fix a couple of typos (NFC)
frasercrmck Feb 6, 2024
d6c7253
[AMDGPU] Add pal metadata 3.0 support to callable pal funcs (#67104)
dstutt Feb 6, 2024
40fd17a
[ARM][AARCH64][NEON]: Wrong return type of NEON intrinsic vqrshrunh_…
hlivin01 Feb 6, 2024
9ea34be
[MC]: Fix typo in MCObjectStreamer.cpp (#80856)
vinayakdsci Feb 6, 2024
e5638c5
[AMDGPU] Use correct number of bits needed for div/rem shrinking (#80…
choikwa Feb 6, 2024
36e8db7
[SLP][NFC]Extract main part of GetGEPCostDiff to a function, NFC.
alexey-bataev Feb 6, 2024
3885483
[lldb][unittest] Add call_once flag to initialize debugger (#80786)
chelcassanova Feb 6, 2024
299e5fe
[SLP][NFC]Simplify/unify vectors for scattered/vectorized loads from
alexey-bataev Feb 6, 2024
6ce4181
[OpenMP] HSA_ENABLE_SDMA visible in libomptarget tests (#80860)
jplehr Feb 6, 2024
93a2a8c
Fix a crash in clang::isGetterOfRefCounted by checking nullptr in try…
rniwa Feb 6, 2024
5690027
[lldb][unittest] Use shared once_flag in DiagnosticEventTest (#80788)
chelcassanova Feb 6, 2024
a628f68
Revert "[clang] Mark clang-format-ignore.cpp as unsupported on Windows"
owenca Feb 6, 2024
8ea858b
[CallPromotionUtil] See through function alias when devirtualizing a …
mingmingl-llvm Feb 6, 2024
6b2fd7a
[MIPS] Use generic isBlockOnlyReachableByFallthrough (#80799)
MaskRay Feb 6, 2024
cca4966
[FastISel][X86] Use getTypeForExtReturn in GetReturnInfo. (#80803)
topperc Feb 6, 2024
2a4f715
[RISCV] Adjust a few vector scheduler class names. NFC (#80795)
topperc Feb 6, 2024
0fb9f68
[SelectionDAG] Use getRegisterType instead of getTypeToTransformTo in…
topperc Feb 6, 2024
1833de3
[Extractor][DebugInfo] Don't pick DebugLocs from dbg intrinsics (#80863)
jmorse Feb 6, 2024
6eb7273
[readtapi] Ensure universal dylibs record the same input path locatio…
cyndyishida Feb 6, 2024
2faeea3
[RISCV] Add Ssqosid support to -march. (#80747)
topperc Feb 6, 2024
c7d181c
[llvm][unittests] Put human-readable names on TargetParserTests. NFC …
jroelofs Feb 6, 2024
a453110
[DebugInfo][RemoveDIs] Extend intrinsic-conversion in debugify (#80861)
jmorse Feb 6, 2024
33cfc13
[github][CODEOWNERS] Add BOLT.
dcci Feb 6, 2024
f2508d0
[RISCV][Docs] Use double underscore for external links in RISCVUsage.…
topperc Feb 6, 2024
5ac2320
[libc][NFC] Fix extraneous namespace on Errno (#80894)
michaelrj-google Feb 6, 2024
a8ab830
Reland "[lldb][progress][NFC] Add unit test for progress reports" (#8…
chelcassanova Feb 6, 2024
cdd9221
[InstCombine] Simplify the overflow result of `umulov X, X` (#80796)
dtcxzyw Feb 6, 2024
6812bc4
[libc] Fix off by one in long double buffer size (#80889)
michaelrj-google Feb 6, 2024
5f87957
[clang][CodeGen][UBSan] Fixing shift-exponent generation for _BitInt …
AdamMagierFOSS Feb 6, 2024
c6691f6
[libc] Fix pread under msan (#80893)
michaelrj-google Feb 6, 2024
ce00fdc
[WebAssembly] Cleanup feature tests (#80780)
aheejin Feb 6, 2024
5b780c8
Diagnose invalid fixed point conversion (#80763)
PiJoules Feb 6, 2024
5ce2f73
[DebugInfo][RemoveDIs] Add some missing test coverage
jmorse Feb 6, 2024
c13e271
Add clang-tidy check to suggest replacement of conditional statement …
11happy Feb 6, 2024
e197b95
[RISCV] Fix typo in call to clearFeatureBits.
topperc Feb 6, 2024
8bb827c
Add test for iterating over MDNode operands when they are empty (#80737)
rastogishubham Feb 6, 2024
4858e9c
[InstCombine] Canonicalize the fcmp range check idiom into `fabs + fc…
dtcxzyw Feb 6, 2024
90e8dc0
Fix failing testcases (#80902)
stephenpeckham Feb 6, 2024
672fb27
[clang][dataflow] Add new `join` API and replace existing `merge` imp…
ymand Feb 6, 2024
4607f38
[RISCV] Use hasStdExtCOrZca instead of FeatureStdExtC to determine NO…
topperc Feb 6, 2024
3f1e95a
[clang][Interp] consider "MS constexpr" functions as well
tbaederr Feb 6, 2024
cd0d11b
[M68k] Convert tests to opaque pointers (NFC)
MaskRay Feb 6, 2024
423ac3d
[CSKY] Convert tests to opaque pointers (NFC)
MaskRay Feb 6, 2024
1c22d3f
[ARC] Convert tests to opaque pointers (NFC)
MaskRay Feb 6, 2024
92b3382
[DebugInfo/MIR] Convert tests to opaque pointers (NFC)
MaskRay Feb 6, 2024
cc55af7
[clang][Interp] Only check ComparisonCategoryInfo in C++ (#80131)
tbaederr Feb 6, 2024
3a05e01
[DebugInfo] Convert tests to opaque pointers (NFC)
MaskRay Feb 6, 2024
51a3019
[Clang][Sema] Implement proposed resolution for CWG2847 (#80899)
sdkrystian Feb 6, 2024
12aad1a
[OpenMP] Support for global variables when in auto zero-copy. (#80876)
carlobertolli Feb 6, 2024
4c9717c
[mlir][openacc] Add private/reduction in legalize data pass (#80882)
clementval Feb 6, 2024
e96ba25
[gn build] Port c13e271a3836
llvmgnsyncbot Feb 6, 2024
091fc81
[libc++][hardening] Check that `_LIBCPP_HARDENING_MODE_DEFAULT` is de…
var-const Feb 6, 2024
c8a97c0
[RISCV] Use hasStdExtCOrZca instead of hasStdExtC in estimateFunction…
topperc Feb 6, 2024
1dd9162
[lldb] Fix a crasher when using the public API. (#80508)
clayborg Feb 6, 2024
1b5fae9
[docs] Try to make it easier to find info about new PM vs legacy PM (…
bjope Feb 6, 2024
e976385
[llvm][GlobalOpt] Optimize statically resolvable IFuncs (#80606)
jroelofs Feb 6, 2024
16d890c
[mlir][ArmNeon] Adds Arm Neon SMMLA, UMMLA, and USMMLA Intrinsics (#…
KoolJBlack Feb 6, 2024
8075f0d
[BOLT] Use new contents when emitting sections with relocations (#80782)
maksfb Feb 6, 2024
b98db44
[BOLT] Make ifunc test not statically-resolvable. NFC
jroelofs Feb 6, 2024
4d8e849
[ConstraintElim] Add facts for llvm.abs >= 0 (#79070)
alexander-shaposhnikov Feb 6, 2024
fbded66
[Driver] Check the environment version except wasm case. (#80783)
ZijunZhaoCCK Feb 6, 2024
08457e1
[libc++] Add tests to pin down the ABI of deque, list and vector (#80…
philnik777 Feb 6, 2024
42357df
[clang] Add zero-initialization for fixed point types (#80781)
PiJoules Feb 6, 2024
2f49058
[-Wunsafe-buffer-usage] Fix debug notes for unclaimed DREs (#80787)
jkorous-apple Feb 7, 2024
1b03cbc
[clang-format] Handle doxygen commands starting with \ (#80381)
XDeme1 Feb 7, 2024
2217837
Support statistics dump summary only mode (#80745)
kusmour Feb 7, 2024
bcd1490
[gn build] Port 2217837c3377
llvmgnsyncbot Feb 7, 2024
4476727
[WebAssembly] Add tests for generic CPU config (#80775)
aheejin Feb 7, 2024
897297e
[WebAssembly] Fix CPU tests in wasm-features.c (#80900)
aheejin Feb 7, 2024
055ac72
[GISel] Add support for scalable vectors in getLCMType (#80306)
michaelmaitland Feb 7, 2024
6d26857
Fix the Docstring.i filename (#80917)
kusmour Feb 7, 2024
bd13241
[MemProf][NFC] Clean up runtime code (#80581)
Enna1 Feb 7, 2024
c5bf1f4
[test] Autogen a test for ease of update in forthcoming patch
preames Feb 7, 2024
1aafe76
[test] Regen a test for naming changes
preames Feb 7, 2024
69a661c
[RISCV] Remove CalleeSavedInfo for Zcmp/save-restore-libcalls registe…
francisvm Feb 7, 2024
cf0773f
[TableGen][NFC] Remove EponymousProcResourceKind (#80812)
wangpc-pp Feb 7, 2024
c7fa25f
[RISCV] Set the RVC bit in the ELF EFlags for C or Zca. (#80913)
topperc Feb 7, 2024
8ea7f1d
[BOLT][NFCI] Keep instruction annotations (#80382)
maksfb Feb 7, 2024
8ae0485
[TableGen] Extend direct lookup to instruction values in generic tabl…
nvjle Feb 7, 2024
adbf21f
[mlir][mesh] Add spmdization pass (#80518)
sogartar Feb 7, 2024
b0785cd
[GlobalISel][ARM] Support missing case for G_CONSTANT (#80555)
spavloff Feb 7, 2024
966f78b
[InstCombine] Resolve TODO: nnan nsz X / -0.0 -> copysign(inf, X) (#7…
AZero13 Feb 7, 2024
86fa21e
[mlir] Fix -Wunused-function in ShardingInterface.cpp (NFC)
DamonFool Feb 7, 2024
679d0d7
[RISCV][Docs] Fix link to Zjpm spec in RISCVUsage.rst.
topperc Feb 7, 2024
c5e5661
[X86] Add missing MACROs in cpuid.h (#80815)
FreddyLeaf Feb 7, 2024
8c84096
[clang][Interp] Fix initializing _Complex values from DeclRefExpr
tbaederr Feb 7, 2024
28b8207
[clang][Interp] Support ImplicitValueInitExpr for complex types
tbaederr Feb 7, 2024
cb7561a
[Sched] Add MacroFusion mutation if fusions are not empty (#72227)
wangpc-pp Feb 7, 2024
ea4f44e
[RISCV] Remove unused variable 'ST' in RISCVTargetMachine.cpp (NFC)
DamonFool Feb 7, 2024
9bda1de
[TwoAddressInstruction] Propagate undef flags for partial defs (#79286)
perlfu Feb 7, 2024
e7c0e59
[BOLT] Fix crash for relocs in data sections against ABS symbols (#76…
mtvec Feb 7, 2024
93962ea
[docs][passes] Update documentation of Analysis and Transform Passes …
bjope Feb 7, 2024
9a028af
[mlir][IR][NFC] `Listener::notifyMatchFailure` returns `void` (#80704)
matthias-springer Feb 7, 2024
2ad6fd6
[RISCV][NFC] Move SFB pseudos and patterns to RISCVInstrInfoSFB.td (#…
wangpc-pp Feb 7, 2024
7d508eb
Revert "[AMDGPU] Add pal metadata 3.0 support to callable pal funcs (…
perlfu Feb 7, 2024
fff86c6
[mlir][ArmSME] Support 4-way widening outer products (#79288)
c-rhodes Feb 7, 2024
67402fe
[flang] Do not move finalized function results in lowering (#80683)
jeanPerier Feb 7, 2024
1b87ebc
[llvm-objcopy] Add --remove-symbol-prefix (#79415)
kongy Feb 7, 2024
e1d564a
[llvm-exegesis] Allow retries on flaky middle half test
boomanaiden154 Feb 7, 2024
0f439f3
[flang] Fix hlfir.as_expr codegen for polymorphic entities (#80824)
jeanPerier Feb 7, 2024
88c830a
[TOSA] Fix avgpool2d accum in wider type (#80849)
RoboTux Feb 7, 2024
f8562e2
[flang][OpenMP][NFC] Further refactoring for `genOpWithBody` & (#80839)
ergawy Feb 7, 2024
365bf43
[LSR] Regenerate test checks (NFC)
nikic Feb 7, 2024
e60c4b6
[InstCombine] Change order of checks for dominating conditions (NFC)
nikic Feb 7, 2024
bec7181
[SCEVExpander] Don't use recursive expansion for ptr IV inc
nikic Feb 7, 2024
eeb60e3
[AMDGPU] Remove unused multiclass
jayfoad Feb 7, 2024
7760006
[libc][stdbit] implement stdc_trailing_ones (C23) (#80459)
nickdesaulniers Feb 7, 2024
670c252
[DAG] Use DAGCombiner::SimplifyDemandedBits wrappers with default (al…
RKSimon Feb 6, 2024
c2a91d4
[X86] combine-movmsk-avx.ll - add full AVX1/AVX2 VTEST/MOVMSK test co…
RKSimon Feb 6, 2024
89ad31f
[RemoveDIs][DebugInfo] Perform some pre-turn-on test maintenence (#80…
jmorse Feb 7, 2024
fb581ad
[SROA] Add tests with gep of index select (NFC)
nikic Feb 7, 2024
af6656c
[clang][Interp][NFC] Fix moveArrayTy byte offset
tbaederr Feb 7, 2024
df856e4
[SLP]Add GEP cost estimation for gathered loads.
alexey-bataev Feb 7, 2024
61c7a69
[clang][Interp] Fix sizeof of reference types
tbaederr Feb 7, 2024
a97ff2d
[clang][Interp] Add missing static_assert message
tbaederr Feb 7, 2024
d109f94
[DebugInfo][RemoveDIs] Re-enable some test coverage
jmorse Feb 7, 2024
f37d81f
[PatternMatch] Add a matching helper `m_ElementWiseBitCast`. NFC. (#8…
dtcxzyw Feb 7, 2024
6cb66ee
[RemoveDIs][DebugInfo] Handle RAUW from dead constants (#80837)
SLTozer Feb 7, 2024
accbcb9
[llvm-objcopy][test] Use actual temporary file names in the test for …
gribozavr Feb 7, 2024
b0c6fc8
[clang][Interp] Ignore UsingEnumDecls
tbaederr Feb 7, 2024
7ab0a87
[InstCombine] Try to freely invert phi nodes (#80804)
dtcxzyw Feb 7, 2024
0aacd44
[RemoveDIs][DebugInfo] Hoist DPValues in SpeculativeExecution (#80886)
SLTozer Feb 7, 2024
de7beb0
[DAG] ExpandShiftWithKnownAmountBit - reduce number of repeated getOp…
RKSimon Feb 7, 2024
50d38cf
[X86] X86FixupVectorConstants.cpp - update comment to describe all th…
RKSimon Feb 7, 2024
4e58f03
[Clang] Fix : More Detailed "No expected directives found" (#78338)
Sh0g0-1758 Feb 7, 2024
c76b0eb
Revert "[RemoveDIs][DebugInfo] Hoist DPValues in SpeculativeExecution…
SLTozer Feb 7, 2024
52bf531
[Clang][Sema] Fix out-of-bounds access (#80978)
Sirraide Feb 7, 2024
5c84054
[LinkerWrapper] Support relocatable linking for offloading (#80066)
jhuber6 Feb 7, 2024
5d8a731
[clang][Interp] Support __builtin_eh_return_data_regno
tbaederr Feb 7, 2024
66d4fe9
[DebugInfo][RemoveDIs] Final final test-maintenence patch (#80988)
jmorse Feb 7, 2024
d42f395
[clang][Interp][NFC] Convert test to verify=expected,both style
tbaederr Feb 7, 2024
7718ac3
[MLIR] NFC. Fix remaining clang-tidy warnings in AffineExpr.cpp (#80933)
bondhugula Feb 7, 2024
d4a2c7f
[clang][Interp] Fix record initialization from temporary in initlist
tbaederr Feb 7, 2024
7a71ac2
[InstCombine] Canonicalize fcmp with inf (#80986)
dtcxzyw Feb 7, 2024
aeb5884
[RemoveDIs] Don't convert debug-info in bitcode-loading just now (#80…
jmorse Feb 7, 2024
c954986
[GISel] Add support for scalable vectors in getGCDType (#80307)
michaelmaitland Feb 7, 2024
4d12292
[AMDGPU] Clean up and share SOP Real instruction definitions (#80990)
jayfoad Feb 7, 2024
4f381af
[InstCombine] Add additional multi-use test for and/or replacement (NFC)
nikic Feb 7, 2024
934ba0d
[InstCombine] Handle missing cases in `visitFCmpInst`
dtcxzyw Feb 7, 2024
8c37e3e
[RISCV] Only set Zca flag for EF_RISCV_RVC in ELFObjectFileBase::getR…
topperc Feb 7, 2024
79fec2f
[AtomicExpand][RISCV] Call shouldExpandAtomicRMWInIR before widenPart…
topperc Feb 7, 2024
7212b4a
[RemoveDIs] Remove unused debug-printing facility for DPMarkers
jmorse Feb 7, 2024
7e4ac85
[Flang] Use specific symbol rather than generic symbol as procInterfa…
DanielCChen Feb 7, 2024
ab92f62
[workflows] Fix libclc CI tests (#80942)
tstellar Feb 7, 2024
65bf93d
[InstCombine] Clean up bitwise folds without one-use check (#80587)
dtcxzyw Feb 7, 2024
bb531c9
[NewPM/Codegen] Move MachineModuleInfo ownership outside of analysis …
aeubanks Feb 7, 2024
5a83bcc
[X86] Fix lowering TLS under darwin large code model (#80907)
aeubanks Feb 7, 2024
eaab6ab
[llc] Respect --print-pipeline-passes when using -passes (#80940)
aeubanks Feb 7, 2024
c1f7f4d
[libc][NFC] Remove dead code (#81005)
gchatelet Feb 7, 2024
e71a5f5
[NFC] Typo in Register.h
mariusz-sikora-at-amd Feb 7, 2024
34f61cf
[DebugInfo][RemoveDIs] Instrument MergeFunctions for DPValues (#80974)
jmorse Feb 7, 2024
e28ca2d
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[mlir][ArmSME] Add rewrite to lift illegal vector.transposes to memor…
…y (#80170)

When unrolling the reduction dimension of something like a matmul for
SME, you can end up with transposed reads of illegal types, like so:

```mlir
%illegalRead = vector.transfer_read %memref[%a, %b]
                : memref<?x?xf32>, vector<[8]x4xf32>
%legalType = vector.transpose %illegalRead, [1, 0]
                : vector<[8]x4xf32> to vector<4x[8]xf32>
```

Here the `vector<[8]x4xf32>` is an illegal type, there's no way to lower
a scalable vector of fixed vectors. However, as the final type
`vector<4x[8]xf32>` is legal, we can instead lift the transpose to
memory (producing a strided memref), and eliminate all the illegal
types. This is shown below.

```mlir
%readSubview = memref.subview %memref[%a, %b] [%c8_vscale, %c4] [%c1, %c1]
                : memref<?x?xf32> to memref<?x?xf32>
%transpose = memref.transpose %readSubview (d0, d1) -> (d1, d0)
                : memref<?x?xf32> to memref<?x?xf32>
%legalType = vector.transfer_read %transpose[%c0, %c0]
                : memref<?x?xf32>, vector<4x[8]xf32>
```
  • Loading branch information
MacDue authored Feb 6, 2024
commit 0473e322f67228a9c2dbf462357e5b4a2b3799be
144 changes: 143 additions & 1 deletion mlir/lib/Dialect/ArmSME/Transforms/VectorLegalization.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -18,6 +18,7 @@
#include "mlir/Dialect/ArmSME/Utils/Utils.h"
#include "mlir/Dialect/Func/IR/FuncOps.h"
#include "mlir/Dialect/Func/Transforms/OneToNFuncConversions.h"
#include "mlir/Dialect/MemRef/IR/MemRef.h"
#include "mlir/Dialect/SCF/Transforms/Patterns.h"
#include "mlir/Dialect/Utils/IndexingUtils.h"
#include "mlir/Transforms/OneToNTypeConversion.h"
Expand Down Expand Up @@ -415,6 +416,146 @@ struct FoldExtractFromVectorOfSMELikeCreateMasks
}
};

/// Lifts an illegal vector.transpose and vector.transfer_read to a
/// memref.subview + memref.transpose, followed by a legal read.
///
/// 'Illegal' here means a leading scalable dimension and a fixed trailing
/// dimension, which has no valid lowering.
///
/// The memref.transpose is metadata-only transpose that produces a strided
/// memref, which eventually becomes a loop reading individual elements.
///
/// Example:
///
/// BEFORE:
/// ```mlir
/// %illegalRead = vector.transfer_read %memref[%a, %b]
/// : memref<?x?xf32>, vector<[8]x4xf32>
/// %legalType = vector.transpose %illegalRead, [1, 0]
/// : vector<[8]x4xf32> to vector<4x[8]xf32>
/// ```
///
/// AFTER:
/// ```mlir
/// %readSubview = memref.subview %memref[%a, %b] [%c8_vscale, %c4] [%c1, %c1]
/// : memref<?x?xf32> to memref<?x?xf32>
/// %transpose = memref.transpose %readSubview (d0, d1) -> (d1, d0)
/// : memref<?x?xf32> to memref<?x?xf32>
/// %legalType = vector.transfer_read %transpose[%c0, %c0]
/// : memref<?x?xf32>, vector<4x[8]xf32>
/// ```
struct LiftIllegalVectorTransposeToMemory
: public OpRewritePattern<vector::TransposeOp> {
using OpRewritePattern<vector::TransposeOp>::OpRewritePattern;

static bool isIllegalVectorType(VectorType vType) {
bool seenFixedDim = false;
for (bool scalableFlag : llvm::reverse(vType.getScalableDims())) {
seenFixedDim |= !scalableFlag;
if (seenFixedDim && scalableFlag)
return true;
}
return false;
}

static Value getExtensionSource(Operation *op) {
if (isa<arith::ExtSIOp, arith::ExtUIOp, arith::ExtFOp>(op))
return op->getOperand(0);
return {};
}

LogicalResult matchAndRewrite(vector::TransposeOp transposeOp,
PatternRewriter &rewriter) const override {
auto sourceType = transposeOp.getSourceVectorType();
auto resultType = transposeOp.getResultVectorType();
if (!isIllegalVectorType(sourceType) || isIllegalVectorType(resultType))
return rewriter.notifyMatchFailure(
transposeOp, "expected transpose from illegal type to legal type");

// Look through extend for transfer_read.
Value maybeRead = transposeOp.getVector();
auto *transposeSourceOp = maybeRead.getDefiningOp();
Operation *extendOp = nullptr;
if (Value extendSource = getExtensionSource(transposeSourceOp)) {
maybeRead = extendSource;
extendOp = transposeSourceOp;
}

auto illegalRead = maybeRead.getDefiningOp<vector::TransferReadOp>();
if (!illegalRead)
return rewriter.notifyMatchFailure(
transposeOp,
"expected source to be (possibly extended) transfer_read");

if (!illegalRead.getPermutationMap().isIdentity())
return rewriter.notifyMatchFailure(
illegalRead, "expected read to have identity permutation map");

auto loc = transposeOp.getLoc();
auto zero = rewriter.create<arith::ConstantIndexOp>(loc, 0);
auto one = rewriter.create<arith::ConstantIndexOp>(loc, 1);

// Create a subview that matches the size of the illegal read vector type.
auto readType = illegalRead.getVectorType();
auto readSizes = llvm::map_to_vector(
llvm::zip_equal(readType.getShape(), readType.getScalableDims()),
[&](auto dim) -> Value {
auto [size, isScalable] = dim;
auto dimSize = rewriter.create<arith::ConstantIndexOp>(loc, size);
if (!isScalable)
return dimSize;
auto vscale = rewriter.create<vector::VectorScaleOp>(loc);
return rewriter.create<arith::MulIOp>(loc, vscale, dimSize);
});
SmallVector<Value> strides(readType.getRank(), Value(one));
auto readSubview = rewriter.create<memref::SubViewOp>(
loc, illegalRead.getSource(), illegalRead.getIndices(), readSizes,
strides);

// Apply the transpose to all values/attributes of the transfer_read:
// - The mask
Value mask = illegalRead.getMask();
if (mask) {
// Note: The transpose for the mask should fold into the
// vector.create_mask/constant_mask op, which will then become legal.
mask = rewriter.create<vector::TransposeOp>(loc, mask,
transposeOp.getPermutation());
}
// - The source memref
mlir::AffineMap transposeMap = AffineMap::getPermutationMap(
transposeOp.getPermutation(), getContext());
auto transposedSubview = rewriter.create<memref::TransposeOp>(
loc, readSubview, AffineMapAttr::get(transposeMap));
ArrayAttr inBoundsAttr = illegalRead.getInBoundsAttr();
// - The `in_bounds` attribute
if (inBoundsAttr) {
SmallVector<Attribute> inBoundsValues(inBoundsAttr.begin(),
inBoundsAttr.end());
applyPermutationToVector(inBoundsValues, transposeOp.getPermutation());
inBoundsAttr = rewriter.getArrayAttr(inBoundsValues);
}

VectorType legalReadType = resultType.clone(readType.getElementType());
// Note: The indices are all zero as the subview is already offset.
SmallVector<Value> readIndices(illegalRead.getIndices().size(), zero);
auto legalRead = rewriter.create<vector::TransferReadOp>(
loc, legalReadType, transposedSubview, readIndices,
illegalRead.getPermutationMapAttr(), illegalRead.getPadding(), mask,
inBoundsAttr);

// Replace the transpose with the new read, extending the result if
// necessary.
rewriter.replaceOp(transposeOp, [&]() -> Operation * {
if (extendOp)
return rewriter.create(loc, extendOp->getName().getIdentifier(),
Value(legalRead), resultType);
return legalRead;
}());

return success();
}
};

struct VectorLegalizationPass
: public arm_sme::impl::VectorLegalizationBase<VectorLegalizationPass> {
void runOnOperation() override {
Expand All @@ -434,7 +575,8 @@ struct VectorLegalizationPass
return success();
});

patterns.add<FoldExtractFromVectorOfSMELikeCreateMasks>(context);
patterns.add<FoldExtractFromVectorOfSMELikeCreateMasks,
LiftIllegalVectorTransposeToMemory>(context);
// Note: High benefit to ensure masked outer products are lowered first.
patterns.add<LegalizeMaskedVectorOuterProductOpsByDecomposition>(
converter, context, 1024);
Expand Down
75 changes: 75 additions & 0 deletions mlir/test/Dialect/ArmSME/vector-legalization.mlir
Original file line number Diff line number Diff line change
Expand Up @@ -302,3 +302,78 @@ func.func @non_constant_extract_from_vector_create_mask_non_constant(%index: ind
%extract = vector.extract %mask[%index] : vector<[4]x[4]xi1> from vector<4x[4]x[4]xi1>
return %extract : vector<[4]x[4]xi1>
}

// -----

// CHECK-LABEL: @lift_illegal_transpose_to_memory(
// CHECK-SAME: %[[INDEXA:[a-z0-9]+]]: index,
// CHECK-SAME: %[[INDEXB:[a-z0-9]+]]: index,
// CHECK-SAME: %[[MEMREF:[a-z0-9]+]]: memref<?x?xf32>)
func.func @lift_illegal_transpose_to_memory(%a: index, %b: index, %memref: memref<?x?xf32>) -> vector<4x[8]xf32> {
// CHECK-DAG: %[[C0:.*]] = arith.constant 0 : index
// CHECK-DAG: %[[C8:.*]] = arith.constant 8 : index
// CHECK-DAG: %[[C0_F32:.*]] = arith.constant 0.000000e+00 : f32
// CHECK-DAG: %[[VSCALE:.*]] = vector.vscale
// CHECK-DAG: %[[C8_VSCALE:.*]] = arith.muli %[[VSCALE]], %[[C8]] : index
// CHECK-NEXT: %[[READ_SUBVIEW:.*]] = memref.subview %[[MEMREF]][%[[INDEXA]], %[[INDEXB]]] [%[[C8_VSCALE]], 4] [1, 1] : memref<?x?xf32> to memref<?x4xf32, strided<[?, 1], offset: ?>>
// CHECK-NEXT: %[[CAST:.*]] = memref.cast %[[READ_SUBVIEW]] : memref<?x4xf32, strided<[?, 1], offset: ?>> to memref<?x?xf32, strided<[?, ?], offset: ?>>
// CHECK-NEXT: %[[TRANSPOSE:.*]] = memref.transpose %[[CAST]] (d0, d1) -> (d1, d0) : memref<?x?xf32, strided<[?, ?], offset: ?>> to memref<?x?xf32, strided<[?, ?], offset: ?>>
// CHECK-NEXT: %[[LEGAL_READ:.*]] = vector.transfer_read %[[TRANSPOSE]][%c0, %c0], %[[C0_F32]] : memref<?x?xf32, strided<[?, ?], offset: ?>>, vector<4x[8]xf32>
// CHECK-NEXT: return %[[LEGAL_READ]]
%pad = arith.constant 0.0 : f32
%illegalRead = vector.transfer_read %memref[%a, %b], %pad : memref<?x?xf32>, vector<[8]x4xf32>
%legalType = vector.transpose %illegalRead, [1, 0] : vector<[8]x4xf32> to vector<4x[8]xf32>
return %legalType : vector<4x[8]xf32>
}

// -----

// CHECK-LABEL: @lift_illegal_transpose_to_memory_with_mask(
// CHECK-SAME: %[[DIM0:[a-z0-9]+]]: index,
// CHECK-SAME: %[[DIM1:[a-z0-9]+]]: index,
// CHECK-SAME: %[[MEMREF:[a-z0-9]+]]: memref<?x?xf32>
func.func @lift_illegal_transpose_to_memory_with_mask(%dim0: index, %dim1: index, %memref: memref<?x?xf32>, %a: index, %b: index) -> vector<4x[8]xf32> {
// CHECK-DAG: %[[READ_SUBVIEW:.*]] = memref.subview %[[MEMREF]]
// CHECK-DAG: %[[CAST:.*]] = memref.cast %[[READ_SUBVIEW]]
// CHECK-DAG: %[[TRANSPOSE:.*]] = memref.transpose %[[CAST]]
// CHECK-DAG: %[[MASK:.*]] = vector.create_mask %[[DIM1]], %[[DIM0]] : vector<4x[8]xi1>
// CHECK: %[[LEGAL_READ:.*]] = vector.transfer_read %[[TRANSPOSE]]
// CHECK-SAME: %[[MASK]] : memref<?x?xf32, strided<[?, ?], offset: ?>>, vector<4x[8]xf32>
// CHECK-NEXT: return %[[LEGAL_READ]]
%pad = arith.constant 0.0 : f32
%mask = vector.create_mask %dim0, %dim1 : vector<[8]x4xi1>
%illegalRead = vector.transfer_read %memref[%a, %b], %pad, %mask : memref<?x?xf32>, vector<[8]x4xf32>
%legalType = vector.transpose %illegalRead, [1, 0] : vector<[8]x4xf32> to vector<4x[8]xf32>
return %legalType : vector<4x[8]xf32>
}

// -----

// CHECK-LABEL: @lift_illegal_transpose_to_memory_with_arith_extop(
// CHECK-SAME: %[[MEMREF:[a-z0-9]+]]: memref<?x?xi8>
func.func @lift_illegal_transpose_to_memory_with_arith_extop(%a: index, %b: index, %memref: memref<?x?xi8>) -> vector<4x[8]xi32> {
// CHECK-DAG: %[[READ_SUBVIEW:.*]] = memref.subview %[[MEMREF]]
// CHECK-DAG: %[[CAST:.*]] = memref.cast %[[READ_SUBVIEW]]
// CHECK-DAG: %[[TRANSPOSE:.*]] = memref.transpose %[[CAST]]
// CHECK: %[[LEGAL_READ:.*]] = vector.transfer_read %[[TRANSPOSE]]
// CHECK-NEXT: %[[EXT_TYPE:.*]] = arith.extsi %[[LEGAL_READ]] : vector<4x[8]xi8> to vector<4x[8]xi32>
// CHECK-NEXT: return %[[EXT_TYPE]]
%pad = arith.constant 0 : i8
%illegalRead = vector.transfer_read %memref[%a, %b], %pad : memref<?x?xi8>, vector<[8]x4xi8>
%extRead = arith.extsi %illegalRead : vector<[8]x4xi8> to vector<[8]x4xi32>
%legalType = vector.transpose %extRead, [1, 0] : vector<[8]x4xi32> to vector<4x[8]xi32>
return %legalType : vector<4x[8]xi32>
}

// -----

// CHECK-LABEL: @lift_illegal_transpose_to_memory_with_in_bounds_attr
func.func @lift_illegal_transpose_to_memory_with_in_bounds_attr(%a: index, %b: index, %memref: memref<?x?xf32>) -> vector<4x[8]xf32> {
// CHECK: vector.transfer_read
// CHECK-SAME: in_bounds = [true, false]
// CHECK-NOT: in_bounds = [false, true]
%pad = arith.constant 0.0 : f32
%illegalRead = vector.transfer_read %memref[%a, %b], %pad {in_bounds = [false, true]}: memref<?x?xf32>, vector<[8]x4xf32>
%legalType = vector.transpose %illegalRead, [1, 0] : vector<[8]x4xf32> to vector<4x[8]xf32>
return %legalType : vector<4x[8]xf32>
}