Missing sub_group support in OpenCL RT for Intel CPU

[vladimirlaz]

Subgroup related built-ins are not implemented in OpenCL CPU RT for all subgroup sizes on avx ISA.
e.g. for sycl/test/sub_group/load_store.cpp

SYCL exception caught: The program was built for 1 devices
Build program log for 'Intel Xeon Processor (Skylake, IBRS)':
Linking started
Linking done
Device build started
Options used by backend compiler:
Failed to build device program
Error: unimplemented function(s) used:
_Z32intel_sub_group_block_read_ul4_8PU3AS1KmDv8_j is undefined
_Z33intel_sub_group_block_write_ul4_8PU3AS1mDv32_mDv8_j is undefined
_Z32intel_sub_group_block_read_us4_8PU3AS1KtDv8_j is undefined
_Z33intel_sub_group_block_write_us4_8PU3AS1tDv32_tDv8_j is undefined
_Z32intel_sub_group_block_read_us8_8PU3AS1KtDv8_j is undefined
_Z33intel_sub_group_block_write_us8_8PU3AS1tDv64_tDv8_j is undefined
_Z32intel_sub_group_block_read_ul8_8PU3AS1KmDv8_j is undefined
_Z33intel_sub_group_block_write_ul8_8PU3AS1mDv64_mDv8_j is undefined
_Z29intel_sub_group_block_read8_8PU3AS1KjDv8_j is undefined
_Z30intel_sub_group_block_write8_8PU3AS1jDv64_jDv8_j is undefined
_Z29intel_sub_group_block_read4_8PU3AS1KjDv8_j is undefined
_Z30intel_sub_group_block_write4_8PU3AS1jDv32_jDv8_j is undefined
CompilerException Failed to parse IR
 -17 (CL_LINK_PROGRAM_FAILURE)
error: command failed with exit status: 1

sycl/test/sub_group/scan_fp64.cpp

SYCL exception caught: The program was built for 1 devices
Build program log for 'Intel Xeon Processor (Skylake, IBRS)':
Linking started
Linking done
Device build started
Options used by backend compiler:
Failed to build device program
Error: unimplemented function(s) used:
_Z28sub_group_scan_exclusive_addDv8_dDv8_j is undefined
_Z28sub_group_scan_inclusive_addDv8_dDv8_j is undefined
CompilerException Failed to parse IR
 -17 (CL_LINK_PROGRAM_FAILURE)
error: command failed with exit status: 1

sycl/test/sub_group/scan.cpp

`SYCL exception caught: The program was built for 1 devices
Build program log for 'Intel Xeon Processor (Skylake, IBRS)':
Linking started
Linking done
Device build started
Options used by backend compiler:
Failed to build device program
Error: unimplemented function(s) used:
_Z28sub_group_scan_exclusive_addDv8_fDv8_j is undefined
_Z28sub_group_scan_inclusive_addDv8_fDv8_j is undefined
CompilerException Failed to parse IR
 -17 (CL_LINK_PROGRAM_FAILURE)
error: command failed with exit status: 1

../sycl/test/sub_group/reduce.cpp

SYCL exception caught: The program was built for 1 devices
Build program log for 'Intel Xeon Processor (Skylake, IBRS)':
Linking started
Linking done
Device build started
Options used by backend compiler:
Failed to build device program
Error: unimplemented function(s) used:
_Z20sub_group_reduce_addDv8_fDv8_j is undefined
CompilerException Failed to parse IR
 -17 (CL_LINK_PROGRAM_FAILURE)
error: command failed with exit status: 1

../sycl/test/sub_group/reduce_fp64.cpp

SYCL exception caught: The program was built for 1 devices
Build program log for 'Intel Xeon Processor (Skylake, IBRS)':
Linking started
Linking done
Device build started
Options used by backend compiler:
Failed to build device program
Error: unimplemented function(s) used:
_Z20sub_group_reduce_addDv8_dDv8_j is undefined
CompilerException Failed to parse IR
 -17 (CL_LINK_PROGRAM_FAILURE)
error: command failed with exit status: 1

[github-actions]

This issue is stale because it has been open 180 days with no activity. Remove stale label or comment or this will be automatically closed in 30 days.

[vladimirlaz]

The missing symbols are available in the latest CPU RT (2021.13.11.0.23)
All impacted tets have been enabled back: intel/llvm-test-suite#858