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MochalovaAnvmaksimo
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Add support for SPV_INTEL_fp_fast_math_mode (#822)
Spec: KhronosGroup/SPIRV-Registry#85 Signed-off-by: amochalo <anastasiya.mochalova@intel.com>
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llvm-spirv/include/LLVMSPIRVExtensions.inc

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@@ -27,3 +27,4 @@ EXT(SPV_INTEL_fpga_buffer_location)
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EXT(SPV_INTEL_arbitrary_precision_fixed_point)
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EXT(SPV_INTEL_arbitrary_precision_floating_point)
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EXT(SPV_INTEL_variable_length_array)
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EXT(SPV_INTEL_fp_fast_math_mode)

llvm-spirv/lib/SPIRV/SPIRVReader.cpp

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@@ -1127,6 +1127,10 @@ static void applyFPFastMathModeDecorations(const SPIRVValue *BV,
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FMF.setNoSignedZeros();
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if (V & FPFastMathModeAllowRecipMask)
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FMF.setAllowReciprocal();
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if (V & FPFastMathModeAllowContractINTELMask)
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FMF.setAllowContract();
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if (V & FPFastMathModeAllowReassocINTELMask)
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FMF.setAllowReassoc();
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if (V & FPFastMathModeFastMask)
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FMF.setFast();
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Inst->setFastMathFlags(FMF);

llvm-spirv/lib/SPIRV/SPIRVWriter.cpp

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@@ -1706,6 +1706,17 @@ bool LLVMToSPIRV::transDecoration(Value *V, SPIRVValue *BV) {
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M |= FPFastMathModeNSZMask;
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if (FMF.allowReciprocal())
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M |= FPFastMathModeAllowRecipMask;
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if (BM->isAllowedToUseExtension(
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ExtensionID::SPV_INTEL_fp_fast_math_mode)) {
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if (FMF.allowContract()) {
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M |= FPFastMathModeAllowContractINTELMask;
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BM->addCapability(CapabilityFPFastMathModeINTEL);
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}
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if (FMF.allowReassoc()) {
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M |= FPFastMathModeAllowReassocINTELMask;
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BM->addCapability(CapabilityFPFastMathModeINTEL);
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}
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}
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}
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if (M != 0)
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BV->setFPFastMathMode(M);

llvm-spirv/lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h

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@@ -488,6 +488,7 @@ template <> inline void SPIRVMap<Capability, std::string>::init() {
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add(CapabilityVariableLengthArrayINTEL, "VariableLengthArrayINTEL");
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add(CapabilityFunctionFloatControlINTEL, "FunctionFloatControlINTEL");
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add(CapabilityFPGAMemoryAttributesINTEL, "FPGAMemoryAttributesINTEL");
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add(CapabilityFPFastMathModeINTEL, "FPFastMathModeINTEL");
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add(CapabilityArbitraryPrecisionIntegersINTEL,
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"ArbitraryPrecisionIntegersINTEL");
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add(CapabilityArbitraryPrecisionFloatingPointINTEL,

llvm-spirv/lib/SPIRV/libSPIRV/spirv.hpp

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@@ -377,6 +377,8 @@ enum FPFastMathModeMask {
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FPFastMathModeNotInfMask = 0x00000002,
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FPFastMathModeNSZMask = 0x00000004,
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FPFastMathModeAllowRecipMask = 0x00000008,
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FPFastMathModeAllowContractINTELMask = 0x00010000,
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FPFastMathModeAllowReassocINTELMask = 0x00020000,
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FPFastMathModeFastMask = 0x00000010,
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};
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@@ -975,6 +977,7 @@ enum Capability {
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CapabilityVariableLengthArrayINTEL = 5817,
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CapabilityFunctionFloatControlINTEL = 5821,
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CapabilityFPGAMemoryAttributesINTEL = 5824,
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CapabilityFPFastMathModeINTEL = 5837,
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CapabilityArbitraryPrecisionIntegersINTEL = 5844,
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CapabilityArbitraryPrecisionFloatingPointINTEL = 5845,
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CapabilityUnstructuredLoopControlsINTEL = 5886,
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@@ -0,0 +1,56 @@
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; RUN: llvm-as %s -o %t.bc
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; RUN: llvm-spirv -spirv-text %t.bc -o - | FileCheck %s --check-prefix=CHECK-SPIRV-OFF
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; RUN: llvm-spirv --spirv-ext=+SPV_INTEL_fp_fast_math_mode -spirv-text %t.bc -o - | FileCheck %s --check-prefix=CHECK-SPIRV-ON
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; RUN: llvm-spirv --spirv-ext=+SPV_INTEL_fp_fast_math_mode %t.bc -o %t.spv
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; RUN: llvm-spirv -r %t.spv -o - | llvm-dis -o - | FileCheck %s --check-prefix=CHECK-LLVM
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; CHECK-SPIRV-ON: 2 Capability FPFastMathModeINTEL
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; CHECK-SPIRV-ON: 3 Name [[mu:[0-9]+]] "mul"
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; CHECK-SPIRV-ON: 3 Name [[su:[0-9]+]] "sub"
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; CHECK-SPIRV-ON: 4 Decorate [[mu]] FPFastMathMode 65536
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; CHECK-SPIRV-ON: 4 Decorate [[su]] FPFastMathMode 131072
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; CHECK-SPIRV-OFF-NOT: 2 Capability FPFastMathModeINTEL
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; CHECK-SPIRV-OFF: 3 Name [[mu:[0-9]+]] "mul"
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; CHECK-SPIRV-OFF: 3 Name [[su:[0-9]+]] "sub"
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; CHECK-SPIRV-OFF-NOT: 4 Decorate [[mu]] FPFastMathMode 65536
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; CHECK-SPIRV-OFF-NOT: 4 Decorate [[su]] FPFastMathMode 131072
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; CHECK-LLVM: %mul = fmul contract float %0, %1
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; CHECK-LLVM: %sub = fsub reassoc float %2, %3
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target datalayout = "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
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target triple = "spir"
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; Function Attrs: convergent noinline norecurse nounwind optnone
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define spir_kernel void @test(float %a, float %b) #0 !kernel_arg_addr_space !3 !kernel_arg_access_qual !4 !kernel_arg_type !5 !kernel_arg_base_type !5 !kernel_arg_type_qual !6 {
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entry:
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%a.addr = alloca float, align 4
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%b.addr = alloca float, align 4
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store float %a, float* %a.addr, align 4
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store float %b, float* %b.addr, align 4
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%0 = load float, float* %a.addr, align 4
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%1 = load float, float* %a.addr, align 4
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%mul = fmul contract float %0, %1
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store float %mul, float* %b.addr, align 4
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%2 = load float, float* %b.addr, align 4
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%3 = load float, float* %b.addr, align 4
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%sub = fsub reassoc float %2, %3
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store float %sub, float* %b.addr, align 4
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ret void
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}
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attributes #0 = { convergent noinline norecurse nounwind optnone "disable-tail-calls"="false" "frame-pointer"="none" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "uniform-work-group-size"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
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!llvm.module.flags = !{!0}
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!opencl.ocl.version = !{!1}
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!opencl.spir.version = !{!1}
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!llvm.ident = !{!2}
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!0 = !{i32 1, !"wchar_size", i32 4}
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!1 = !{i32 2, i32 0}
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!2 = !{!"clang version 12.0.0 (https://github.com/intel/llvm.git 5cf8088c994778561c8584d5433d7d32618725b2)"}
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!3 = !{i32 0, i32 0}
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!4 = !{!"none", !"none"}
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!5 = !{!"float", !"float"}
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!6 = !{!"", !""}

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