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[SYCL] Add kernel property parsing to sycl-post-link (#7017)
This commit adds parsing of compile-time properties for kernels to sycl-post-link. This includes the following: * sycl-post-link is now able to generate metadata for recognized SYCL LLVM IR attributes on functions. These are "sycl-work-group-size", "sycl-work-group-size-hint", and "sycl-sub-group-size". * The previously mentioned new recognized LLVM IR attributes are translated into existing metadata the SPIR-V Translator translates into corresponding SPIR-V execution modes. If these metadata nodes already exist on a function (e.g. added through a SYCL 2020 attribute), the related property is ignored. This is split from #6941. Signed-off-by: Larsen, Steffen <steffen.larsen@intel.com>
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; RUN: sycl-post-link --ir-output-only --device-globals %s -S -o - | FileCheck %s --check-prefix CHECK-IR | ||
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; CHECK-IR-DAG: @"_ZTSZZ4mainENK3$_0clERN2cl4sycl7handlerEE9TheKernel0"() #0 {{.*}}!intel_reqd_sub_group_size ![[SGSizeMD0:[0-9]+]] {{.*}}!reqd_work_group_size ![[WGSizeMD0:[0-9]+]]{{.*}}!work_group_size_hint ![[WGSizeHintMD0:[0-9]+]] | ||
; Function Attrs: convergent norecurse | ||
define weak_odr dso_local spir_kernel void @"_ZTSZZ4mainENK3$_0clERN2cl4sycl7handlerEE9TheKernel0"() #0 { | ||
entry: | ||
ret void | ||
} | ||
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; CHECK-IR-DAG: @"_ZTSZZ4mainENK3$_0clERN2cl4sycl7handlerEE9TheKernel1"() #1 {{.*}}!reqd_work_group_size ![[WGSizeMD1:[0-9]+]]{{.*}}!work_group_size_hint ![[WGSizeHintMD1:[0-9]+]] | ||
; Function Attrs: convergent norecurse | ||
define weak_odr dso_local spir_kernel void @"_ZTSZZ4mainENK3$_0clERN2cl4sycl7handlerEE9TheKernel1"() #1 { | ||
entry: | ||
ret void | ||
} | ||
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; CHECK-IR-DAG: @"_ZTSZZ4mainENK3$_0clERN2cl4sycl7handlerEE9TheKernel2"() #2 {{.*}}!reqd_work_group_size ![[WGSizeMD2:[0-9]+]]{{.*}}!work_group_size_hint ![[WGSizeHintMD2:[0-9]+]] | ||
; Function Attrs: convergent norecurse | ||
define weak_odr dso_local spir_kernel void @"_ZTSZZ4mainENK3$_0clERN2cl4sycl7handlerEE9TheKernel2"() #2 { | ||
entry: | ||
ret void | ||
} | ||
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attributes #0 = { convergent norecurse "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "sycl-module-id"="kernel_properties.cpp" "uniform-work-group-size"="true" "sycl-work-group-size"="1" "sycl-work-group-size-hint"="2" "sycl-sub-group-size"="3" } | ||
attributes #1 = { convergent norecurse "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "sycl-module-id"="kernel_properties.cpp" "uniform-work-group-size"="true" "sycl-work-group-size"="4,5" "sycl-work-group-size-hint"="6,7" } | ||
attributes #2 = { convergent norecurse "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "sycl-module-id"="kernel_properties.cpp" "uniform-work-group-size"="true" "sycl-work-group-size"="8,9,10" "sycl-work-group-size-hint"="11,12,13" } | ||
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!opencl.spir.version = !{!0, !0, !0, !0, !0, !0, !0, !0, !0, !0, !0} | ||
!spirv.Source = !{!1, !1, !1, !1, !1, !1, !1, !1, !1, !1, !1} | ||
!llvm.ident = !{!2, !2, !2, !2, !2, !2, !2, !2, !2, !2, !2} | ||
!llvm.module.flags = !{!3, !4} | ||
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!0 = !{i32 1, i32 2} | ||
!1 = !{i32 4, i32 100000} | ||
!2 = !{!"clang version 13.0.0 (https://github.com/intel/llvm)"} | ||
!3 = !{i32 1, !"wchar_size", i32 4} | ||
!4 = !{i32 7, !"frame-pointer", i32 2} | ||
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; Note that work-group sizes are padded with 1's after being reversed. | ||
; CHECK-IR-DAG: ![[SGSizeMD0]] = !{i32 3} | ||
; CHECK-IR-DAG: ![[WGSizeMD0]] = !{i{{[0-9]+}} 1, i{{[0-9]+}} 1, i{{[0-9]+}} 1} | ||
; CHECK-IR-DAG: ![[WGSizeHintMD0]] = !{i{{[0-9]+}} 2, i{{[0-9]+}} 1, i{{[0-9]+}} 1} | ||
; CHECK-IR-DAG: ![[WGSizeMD1]] = !{i{{[0-9]+}} 5, i{{[0-9]+}} 4, i{{[0-9]+}} 1} | ||
; CHECK-IR-DAG: ![[WGSizeHintMD1]] = !{i{{[0-9]+}} 7, i{{[0-9]+}} 6, i{{[0-9]+}} 1} | ||
; CHECK-IR-DAG: ![[WGSizeMD2]] = !{i{{[0-9]+}} 10, i{{[0-9]+}} 9, i{{[0-9]+}} 8} | ||
; CHECK-IR-DAG: ![[WGSizeHintMD2]] = !{i{{[0-9]+}} 13, i{{[0-9]+}} 12, i{{[0-9]+}} 11} |
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