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Update IMEX/LLVM versions (#399)
* Update IMEX/LLVM versions Signed-off-by: dchigarev <dmitry.chigarev@intel.com> * fix code-style Signed-off-by: dchigarev <dmitry.chigarev@intel.com> * change repo Signed-off-by: dchigarev <dmitry.chigarev@intel.com> --------- Signed-off-by: dchigarev <dmitry.chigarev@intel.com>
1 parent b599319 commit 6feea7f

10 files changed

+18
-16
lines changed

‎cmake/imex-version.txt

Lines changed: 1 addition & 1 deletion
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@@ -1 +1 @@
1-
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1+
0a6d2901990183ecdbab9240dbd8be92036d9c20

‎cmake/llvm-version-imex.txt

Lines changed: 1 addition & 1 deletion
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@@ -1 +1 @@
1-
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add6b2f35f2bcf1f59a2ab2d5b3dab124fe0895a

‎cmake/llvm-version.txt

Lines changed: 1 addition & 1 deletion
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@@ -1 +1 @@
1-
f6a756f35a4d0719a96b4e214905369d565d87da
1+
add6b2f35f2bcf1f59a2ab2d5b3dab124fe0895a

‎lib/gc/Transforms/GPU/LinalgToXeGPU.cpp

Lines changed: 8 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -764,7 +764,9 @@ loadNdDescTiles(PatternRewriter &rewriter, Location loc, ValueRange loadTiles,
764764
if (vnniConf) {
765765
vecLoadType = getVnniVector(tileType.getShape(), tileType.getElementType(),
766766
*vnniConf);
767-
packedAttr = mlir::UnitAttr::get(rewriter.getContext());
767+
if (!transpose_bit) {
768+
packedAttr = mlir::UnitAttr::get(rewriter.getContext());
769+
}
768770
}
769771
SmallVector<Value> loadVec;
770772
for (auto tile : loadTiles) {
@@ -1165,7 +1167,6 @@ static LogicalResult createDPASKernel(linalg::LinalgOp linalgOp,
11651167
if (vnniFactor == -1)
11661168
return failure();
11671169

1168-
VnniConfig vnniConfA{.vnniFactor = vnniFactor, .vnniAxis = 1};
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VnniConfig vnniConfB{.vnniFactor = vnniFactor, .vnniAxis = 0};
11701171

11711172
// Load A sub-tiles.
@@ -1212,9 +1213,9 @@ static LogicalResult createDPASKernel(linalg::LinalgOp linalgOp,
12121213
}
12131214

12141215
// Extract DPAS tiles from loaded sub-tiles.
1215-
TilesArray dpasVecA = extractVecSubTiles(rewriter, loc, loadVecA,
1216-
{dimM, kTile}, tileTypeA.getShape(),
1217-
{dpasTileM, dpasTileK}, vnniConfA);
1216+
TilesArray dpasVecA =
1217+
extractVecSubTiles(rewriter, loc, loadVecA, {dimM, kTile},
1218+
tileTypeA.getShape(), {dpasTileM, dpasTileK});
12181219
TilesArray dpasVecB = extractVecSubTiles(rewriter, loc, loadVecB,
12191220
{kTile, dimN}, tileTypeB.getShape(),
12201221
{dpasTileK, dpasTileN}, vnniConfB);
@@ -1629,7 +1630,8 @@ struct LinalgToXeGPU : public gc::impl::LinalgToXeGPUBase<LinalgToXeGPU> {
16291630
using LinalgToXeGPUBase::LinalgToXeGPUBase;
16301631

16311632
void runOnOperation() override {
1632-
LinalgToXeGPUOptions options{kTile, stages, dpasTile};
1633+
LinalgToXeGPUOptions options{
1634+
kTile, stages, SmallVector<int64_t>(dpasTile.begin(), dpasTile.end())};
16331635

16341636
// Run GEMM pattern first to allow fusion with its consumers.
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RewritePatternSet gemmPatterns(&getContext());

‎lib/gc/Transforms/Pipeline.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -78,10 +78,10 @@ void populateTensorPasses(mlir::OpPassManager &pm) {
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// scf + arith + math + vector + tensor + linalg.brgemm
7979
void populateVectorPasses(mlir::OpPassManager &pm) {
8080
// Do promotion for math / arith ops
81-
pm.addNestedPass<func::FuncOp>(math::createMathLegalizeToF32());
81+
pm.addNestedPass<func::FuncOp>(math::createMathExtendToSupportedTypes());
8282
// sourceTypeStrs can be extended
8383
arith::ArithEmulateUnsupportedFloatsOptions options;
84-
std::array<std::string, 1> typeStr = {"bf16"};
84+
SmallVector<std::string, 1> typeStr = {"bf16"};
8585
options.sourceTypeStrs = typeStr;
8686
options.targetTypeStr = "f32";
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pm.addNestedPass<func::FuncOp>(

‎test/mlir/test/gc/Transforms/GPU/linalg-to-xegpu-dpas-transpose-sep-alloc.mlir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -76,7 +76,7 @@ module {
7676
// Tile B is already in the correct shape.
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// CHECK: %[[vA_flat:.+]] = vector.shape_cast %[[vA]] : vector<32x16xf16> to vector<512xf16>
7878
// CHECK: %[[vA_dpas_flat:.+]] = vector.extract_strided_slice{{.*}}: vector<512xf16> to vector<128xf16>
79-
// CHECK: %[[vA_dpas:.+]] = vector.shape_cast %[[vA_dpas_flat]] : vector<128xf16> to vector<8x8x2xf16>
79+
// CHECK: %[[vA_dpas:.+]] = vector.shape_cast %[[vA_dpas_flat]] : vector<128xf16> to vector<8x16xf16>
8080
// CHECK-COUNT-3: vector.extract_strided_slice
8181

8282
// Perform DPAS computation.

‎test/mlir/test/gc/Transforms/GPU/linalg-to-xegpu-dpas-transpose-sep.mlir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -75,7 +75,7 @@ module {
7575
// Tile B is already in the correct shape.
7676
// CHECK: %[[vA_flat:.+]] = vector.shape_cast %[[vA]] : vector<32x16xf16> to vector<512xf16>
7777
// CHECK: %[[vA_dpas_flat:.+]] = vector.extract_strided_slice{{.*}}: vector<512xf16> to vector<128xf16>
78-
// CHECK: %[[vA_dpas:.+]] = vector.shape_cast %[[vA_dpas_flat]] : vector<128xf16> to vector<8x8x2xf16>
78+
// CHECK: %[[vA_dpas:.+]] = vector.shape_cast %[[vA_dpas_flat]] : vector<128xf16> to vector<8x16xf16>
7979
// CHECK-COUNT-3: vector.extract_strided_slice
8080

8181
// Perform DPAS computation.

‎test/mlir/test/gc/Transforms/GPU/linalg-to-xegpu-dpas-transpose.mlir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -68,7 +68,7 @@ module {
6868
// Tile B is already in the correct shape.
6969
// CHECK: %[[vA_flat:.+]] = vector.shape_cast %[[vA]] : vector<32x16xf16> to vector<512xf16>
7070
// CHECK: %[[vA_dpas_flat:.+]] = vector.extract_strided_slice{{.*}}: vector<512xf16> to vector<128xf16>
71-
// CHECK: %[[vA_dpas:.+]] = vector.shape_cast %[[vA_dpas_flat]] : vector<128xf16> to vector<8x8x2xf16>
71+
// CHECK: %[[vA_dpas:.+]] = vector.shape_cast %[[vA_dpas_flat]] : vector<128xf16> to vector<8x16xf16>
7272
// CHECK-COUNT-3: vector.extract_strided_slice
7373

7474
// Perform DPAS computation.

‎test/mlir/test/gc/Transforms/GPU/linalg-to-xegpu-dpas.mlir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -65,7 +65,7 @@ func.func @matmul(%arg0: memref<32x32xf16>, %arg1: memref<32x32xf16>, %arg2: mem
6565
// Tile B is already in the correct shape.
6666
// CHECK: %[[vA_flat:.+]] = vector.shape_cast %[[vA]] : vector<32x16xf16> to vector<512xf16>
6767
// CHECK: %[[vA_dpas_flat:.+]] = vector.extract_strided_slice{{.*}}: vector<512xf16> to vector<128xf16>
68-
// CHECK: %[[vA_dpas:.+]] = vector.shape_cast %[[vA_dpas_flat]] : vector<128xf16> to vector<8x8x2xf16>
68+
// CHECK: %[[vA_dpas:.+]] = vector.shape_cast %[[vA_dpas_flat]] : vector<128xf16> to vector<8x16xf16>
6969
// CHECK-COUNT-3: vector.extract_strided_slice
7070

7171
// Perform DPAS computation.

‎test/mlir/test/gc/Transforms/bf16Legalization.mlir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
// RUN: gc-opt %s --math-legalize-to-f32 --arith-emulate-unsupported-floats="source-types=bf16 target-type=f32" --canonicalize | FileCheck %s
1+
// RUN: gc-opt %s --math-extend-to-supported-types --arith-emulate-unsupported-floats="source-types=bf16 target-type=f32" --canonicalize | FileCheck %s
22

33
// CHECK-LABEL: @sin
44
// CHECK-SAME: ([[ARG0:%.+]]: bf16)

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