reset_and_cdc_synchronizer

-- Async Reset Synchronizer synchronizes the de-assertion of asynchronous reset to the design's clock domain.

-- Reset Synchronizer synchronizes asynchronous reset and generates a fully synchronous reset to the design's clock domain.

-- CDC Synchronizer synchronizes 1-bit signal from source clock domain safely to destination clock domain.

Source codes included

-- Async Reset Synchronizer

-- Reset Synchronizer

-- CDC Synchronizer

Comments

All codes are fully synthesizable and tested. All are open-source codes, free to use, modify and distribute without any conflicts of interest with the original developer.

Developer

Mitu Raj, iammituraj@gmail.com, chip@chipmunklogic.com