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@ludfjig ludfjig commented Sep 23, 2025

This PR is part of my bigger effort to refactor VM trait (PR 1/3). This PR introduces registers structs that abstract over differences between kvm, mshv, and whp, for general registers, special registers, and fpu registers. It also fixes some UB where whp requires register values to be 16-aligned.

The introduced abstractions are not too useful when just looking at this PR in isolation, but future PR will refactor and deduplicate a bunch of code, where this will be needed.

Closes #908
Closes #312

@ludfjig ludfjig added the kind/enhancement For PRs adding features, improving functionality, docs, tests, etc. label Sep 23, 2025
@ludfjig ludfjig force-pushed the common_regs branch 4 times, most recently from c1ada25 to a523458 Compare September 26, 2025 18:26
/// This is a default implementation that works for all hypervisors
fn setup_initial_sregs(&mut self, _pml4_addr: u64) -> Result<()> {
#[cfg(feature = "init-paging")]
let sregs = CommonSpecialRegisters {
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@jsturtevant jsturtevant Sep 29, 2025

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Having registers in one location seems like a create improvement as we move forward with adding new features.

@ludfjig ludfjig mentioned this pull request Sep 30, 2025
@ludfjig ludfjig force-pushed the common_regs branch 4 times, most recently from 5950288 to bcbe77f Compare October 1, 2025 19:52
dblnz
dblnz previously approved these changes Oct 1, 2025
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Great work, @ludfjig!
This makes the code a lot easier to read 😄

#[allow(dead_code)]
fn sregs(&self) -> Result<CommonSpecialRegisters>;
/// Set special regs
#[allow(dead_code)]
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Are this allow(dead_code) really needed?

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yes. In next PR I will consolidate everything

@@ -0,0 +1,466 @@
/*
Copyright 2024 The Hyperlight Authors.
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I am not sure what the guidance is here, but shouldn't we use 2025 if we added the file this year? I'm asking for myself also, to know how I do it.

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I'm not sure tbh :D

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For new files , I think definitely, I think i we update files we should probably update it as well?

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Co-pilot seems to agree 😄

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I had done something similar but only for this tracing scope.
The unification you've done is more comprehensive

@danbugs danbugs requested a review from Copilot October 2, 2025 02:16
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Pull Request Overview

This PR introduces unified register representations across hypervisor platforms (KVM, MSHV, and WHP) through new CommonRegisters, CommonSpecialRegisters, and CommonFpu abstractions. This unification is the first part of a larger VM trait refactoring effort and addresses UB issues with WHP by ensuring proper 16-byte alignment for register values.

Key changes:

  • Introduces common register abstractions that abstract over hypervisor-specific register formats
  • Implements alignment wrapper (Align16) to fix undefined behavior in Windows Hypervisor Platform register handling
  • Refactors existing register manipulation code to use the new common interfaces

Reviewed Changes

Copilot reviewed 17 out of 19 changed files in this pull request and generated 3 comments.

Show a summary per file
File Description
typos.toml Added "fpr" to typo exceptions for floating-point register field names
src/hyperlight_host/src/sandbox/outb.rs Updated to use common register interfaces instead of platform-specific trace register reads
src/hyperlight_host/src/hypervisor/regs/ New module containing common register abstractions and conversions
src/hyperlight_host/src/hypervisor/mod.rs Added common register trait methods and default special register setup
src/hyperlight_host/src/hypervisor/wrappers.rs Removed platform-specific register structs now replaced by common abstractions
Various hypervisor implementations Updated to implement new register trait methods and use common register types

@@ -0,0 +1,466 @@
/*
Copyright 2024 The Hyperlight Authors.
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Copilot AI Oct 2, 2025

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The copyright year should be 2025 to match the other files in this PR. Other files in this change use 2025.

Suggested change
Copyright 2024 The Hyperlight Authors.
Copyright 2025 The Hyperlight Authors.

Copilot uses AI. Check for mistakes.

danbugs
danbugs previously approved these changes Oct 2, 2025
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LGTM! Awesome work!!

WHvX64RegisterRip,
WHvX64RegisterRflags,
];

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Nit: might be good to add a compile time check that the length of the array matches WHP_REGS_NAMES_LEN?

#[cfg(target_os = "windows")]
const _: () = assert!(WHP_REGS_NAMES.len() == WHP_REGS_NAMES_LEN);

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@ludfjig ludfjig Oct 2, 2025

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That should already be type-checked in the type declaration pub(crate) const WHP_REGS_NAMES: [WHV_REGISTER_NAME; WHP_REGS_NAMES_LEN] = ....

@ludfjig ludfjig dismissed stale reviews from danbugs and dblnz via ac19015 October 2, 2025 22:07
Signed-off-by: Ludvig Liljenberg <4257730+ludfjig@users.noreply.github.com>
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WHV_REGISTER_VALUE needs 16-alignment Unify register representations across all Hypervisor implementations

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