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Commits on Dec 29, 2017

• allow disabling global Serial and Serial1 object (#2807)

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  Palatis

  authored and

  devyte

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Commits on Oct 15, 2017

• Add a workaround-delay in Serial.flush() (#3714)

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  WereCatf

  authored and

  igrr

  committed
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Commits on Jul 8, 2016

• Implement Serial RX Buffer (#2239)

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  me-no-dev

  authored and

  igrr

  committed
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Commits on Jun 15, 2016

• Added Serial.baudRate() to get current baud rate (#2079)

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  hallard

  authored and

  igrr

  committed
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Commits on Feb 22, 2016

• not keep freed pointer of uart handler

  Links2004

  committed
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Commits on Jan 26, 2016

• Remove UART register reference from HardwareSerial

  igrr

  committed
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• Implement HardwareSerial::peek

  igrr

  committed
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• Move UART HAL into separate file, clean up code

  igrr

  committed
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• Bufferless and Interruptless HardwareSerial

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  Me No Dev

  authored and

  igrr

  committed
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• rename cbuf::getSize to cbuf::available (return available Bytes in cbuf)

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  Links2004

  committed
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Commits on Jan 14, 2016

• Use explicit TX pin number and add pins setting method

  KaloNK

  committed
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• Allow setting alternate TX for UART 0, so GPIO1 is available as SPI_CS1

  KaloNK

  committed
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Commits on Dec 29, 2015

• Remove tracking of whether write() was called.

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  alltheblinkythings

  committed
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• Don't trip the WDT if interrupts are disabled during write() or flush().

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  alltheblinkythings

  committed
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• Make HardwareSerial::begin() and end() interrupt safe and disable TX/RX if we can't allocate a buffer for them.

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Commits on Dec 28, 2015

• Put HardwareSerial and cbuf methods called from interrupt context in RAM.

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  alltheblinkythings

  committed
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• Don't bother testing isRxEnabled() on UART1 - it is always false.

  alltheblinkythings

  committed
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• Re-enable interrupts before directly enqueuing characters in the UART FIFO.

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  alltheblinkythings

  committed
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Commits on Dec 14, 2015

• Protect HardwareSerial's cbuf usage with InterruptLock.

  alltheblinkythings

  committed
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Commits on Dec 7, 2015

• Always arm the "TX FIFO Empty" interrupt after we write into _tx_buffer.

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Commits on Sep 9, 2015

• Force disable IOSWAP for UART0 in HardwareSerial initialization (#744)

  igrr

  committed
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Commits on Jul 20, 2015

• Pass timeout to optimistic_yield, add cont_can_yield check

  igrr

  committed
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Commits on Jul 15, 2015

• define in header

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  Makuna

  committed
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Commits on Jul 13, 2015

• optimistic_yield()

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  Makuna

  committed
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Commits on Jun 26, 2015

• Merge pull request #438 from Links2004/esp8266

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  igrr

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Commits on Jun 20, 2015

• Enable Serial RX/TX Only mode (needed by I2S)

  

  John Doe

  authored and

  John Doe

  committed
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Commits on Jun 19, 2015

• fix problems with serial and cbuf (some times freeze on high load)

  Links2004

  committed
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Commits on Jun 1, 2015

• register and clock changes

  

  John Doe

  authored and

  John Doe

  committed
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Commits on May 17, 2015

• improve os_printf handling when buffer full.

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  Links2004

  committed
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Commits on May 14, 2015

• fix bug when TX buffer is full and os will write.

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  Links2004

  committed
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Commits on May 12, 2015

• fix uart receive

  

  ficeto

  authored and

  ficeto

  committed
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Commits on May 5, 2015

• small clean up of HardwareSerial

  igrr

  committed
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Commits on May 3, 2015

• fix UART clock divider

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  ficeto

  authored and

  ficeto

  committed
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• Change UART register access methods

  

  ficeto

  authored and

  ficeto

  committed
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Commits on May 1, 2015

• Revert "Revert "disable debug on Serial.end() if debug on this interface.""

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  ficeto

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  ficeto

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