hwlabnitc / Finite-State-Machines Public

Notifications You must be signed in to change notification settings
Fork 3
Star 1

This is the second module of the Hardware Lab Course to build a single cycle processor at NIT Calicut Topics Resources

1 star 3 forks Branches Tags Activity

Notifications

Name		Name	Last commit message	Last commit date
Latest commit History 20 Commits
README.md		README.md

Repository files navigation

Finite State Machines

Sample Questions

Note: The given testbenches are indicative only.

Design the following Finite State Machines:

Q1. Chess Clock

Q2. Mealy Machine

Q3. Moore Machine

Q4. Vending Machine

About

This is the second module of the Hardware Lab Course to build a single cycle processor at NIT Calicut Topics Resources

Custom properties

Report repository

Releases

No releases published

Packages

No packages published

Contributors 5