[FIRRTL] Copy Memory Annotations in BlackBoxMemory

Fix BlackBoxMemory to copy annotations from the memory to the external
memory (and not the wrapper if doing wrapping).

Note: this DOES NOT copy annotations associated with the memory ports.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>

lib/Dialect/FIRRTL/Transforms/BlackBoxMemory.cpp

@@ -198,8 +198,8 @@ static FModuleOp createWrapperModule(MemOp op,
 
   // Create the module
   builder.setInsertionPointToStart(moduleOp.getBody());
-  auto instanceOp =
-      builder.create<InstanceOp>(op.getLoc(), extModuleOp, op.name());
+  auto instanceOp = builder.create<InstanceOp>(
+      op.getLoc(), extModuleOp, op.name(), AnnotationSet(op).getArray());
 
   // Connect the ports between the memory module and the instance of the black
   // box memory module. The outer module has a single bundle representing each
@@ -361,7 +361,8 @@ replaceMemWithExtModule(DenseMap<MemOp, FExtModuleOp, MemOpInfo> &knownMems,
 
   // Create an instance of the black box module
   auto instanceOp =
-      builder.create<InstanceOp>(memOp.getLoc(), extModuleOp, memOp.name());
+      builder.create<InstanceOp>(memOp.getLoc(), extModuleOp, memOp.name(),
+                                 AnnotationSet(memOp).getArray());
 
   // Create a wire for every memory port
   SmallVector<Value, 2> results;

test/Dialect/FIRRTL/blackbox-memory.mlir

@@ -483,3 +483,25 @@ firrtl.circuit "Duplicate" {
 // INLINE-NEXT:     firrtl.connect %WriteMemory2_W0_mask, %32 : !firrtl.uint<1>, !firrtl.uint<1>
 // INLINE-NEXT:   }
 // INLINE-NEXT: }
+
+// Check that the annotation assocaited with the memory gets copied to the
+// external memory.  Ensure that this works correctly for both the wrapper and
+// inline variants.  (Specifically that the wrapper variant only copies the
+// annotation onto the external memory and not the wrapper module.)
+firrtl.circuit "AnnotationsMove" {
+  firrtl.module @AnnotationsMove() {
+     %r0 = firrtl.mem Undefined {
+       annotations = [{class = "a"}],
+       depth = 16 : i64,
+       name = "ReadMemory",
+       portNames = ["read0"],
+       readLatency = 1 : i32,
+       writeLatency = 1 : i32} :
+     !firrtl.bundle<addr: uint<4>, en: uint<1>, clk: clock, data flip: sint<8>>
+  }
+}
+
+// CHECK-LABEL: "AnnotationsMove"
+// WRAPPER:     firrtl.instance ReadMemory {annotations = [{class = "a"}]} @ReadMemory_ext
+// INLINE:      firrtl.instance ReadMemory {annotations = [{class = "a"}]} @ReadMemory
+// CHECK-NOT:   {class = "a"}