periph/spi: printing and testing SPI clock rates

tests/periph_spi: printing and testing SPI clock rates drivers/periph_spi: change API of spi_acquire (from RIOT-OS#15904) drivers/periph_spi: add the `bus` parameter to spi_get_*() This was necessary for implementations where multiple devices can have different clock sources. This broke the macros SPI_CLK_* that were reverted to an enum. periph/spi: adapted to the new API Arbitrary speed support was added to all implementations where it was missing. 2023-06: - rebased on current master - some backports from 2022 RIOT-OS#18374 - 3 new implementations adapted (gd32v, rpx0xx, and esp32) - minial frequency asserts was replaced by return codes - useless upper frequency bounding removed from many implementations - SPI_DIV_UP was replaced by the new DIV_ROUND_UP from macros/math.h - driver clock configuration caching was removed from implementations where it exists because it should be done at application level with this new API - br computation was simplified for stm32 / gd32v as performace optimisation is no longer needed at this level and the inaccuracy of the fixed point arithmetic was unreliable for frequencies requested lower but close to resulting frequencies
hugueslarrive · Jul 2, 2023 · 5d92f7a · 5d92f7a
1 parent 92529a8
commit 5d92f7a
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diff --git a/.github/workflows/tools-buildtest.yml b/.github/workflows/tools-buildtest.yml
@@ -28,8 +28,6 @@ jobs:
           path: dist/tools
         - name: bossa-nrf52
           path: dist/tools
-        - name: calc_spi_scalers
-          path: cpu/kinetis/dist
         - name: clk_conf
           path: cpu/stm32/dist
         - name: edbg

diff --git a/boards/common/kw41z/include/periph_conf_common.h b/boards/common/kw41z/include/periph_conf_common.h
@@ -122,50 +122,6 @@ static const uart_conf_t uart_config[] = {
 #define LPUART_0_SRC        3
 /** @} */
 
-/**
- * @name   SPI clock configuration
- *
- * Clock configuration values based on the configured 16Mhz module clock.
- *
- * Auto-generated by:
- * cpu/kinetis/dist/calc_spi_scalers/calc_spi_scalers.c
- *
-* @{
-*/
-static const uint32_t spi_clk_config[] = {
-    (
-        SPI_CTAR_PBR(2) | SPI_CTAR_BR(5) |          /* -> 100000Hz */
-        SPI_CTAR_PCSSCK(2) | SPI_CTAR_CSSCK(4) |
-        SPI_CTAR_PASC(2) | SPI_CTAR_ASC(4) |
-        SPI_CTAR_PDT(2) | SPI_CTAR_DT(4)
-    ),
-    (
-        SPI_CTAR_PBR(2) | SPI_CTAR_BR(3) |          /* -> 400000Hz */
-        SPI_CTAR_PCSSCK(2) | SPI_CTAR_CSSCK(2) |
-        SPI_CTAR_PASC(2) | SPI_CTAR_ASC(2) |
-        SPI_CTAR_PDT(2) | SPI_CTAR_DT(2)
-    ),
-    (
-        SPI_CTAR_PBR(0) | SPI_CTAR_BR(3) |          /* -> 1000000Hz */
-        SPI_CTAR_PCSSCK(0) | SPI_CTAR_CSSCK(3) |
-        SPI_CTAR_PASC(0) | SPI_CTAR_ASC(3) |
-        SPI_CTAR_PDT(0) | SPI_CTAR_DT(3)
-    ),
-    (
-        SPI_CTAR_PBR(0) | SPI_CTAR_BR(0) |          /* -> 4000000Hz */
-        SPI_CTAR_PCSSCK(0) | SPI_CTAR_CSSCK(1) |
-        SPI_CTAR_PASC(0) | SPI_CTAR_ASC(1) |
-        SPI_CTAR_PDT(0) | SPI_CTAR_DT(1)
-    ),
-    (
-        SPI_CTAR_PBR(0) | SPI_CTAR_BR(0) |          /* -> 4000000Hz */
-        SPI_CTAR_PCSSCK(0) | SPI_CTAR_CSSCK(0) |
-        SPI_CTAR_PASC(0) | SPI_CTAR_ASC(0) |
-        SPI_CTAR_PDT(0) | SPI_CTAR_DT(0)
-    )
-};
-/** @} */
-
 /**
  * @name Random Number Generator configuration
  * @{

diff --git a/boards/frdm-k22f/include/periph_conf.h b/boards/frdm-k22f/include/periph_conf.h
@@ -1,5 +1,6 @@
 /*
  * Copyright (C) 2017 Eistec AB
+ *               2021-2023 Hugues Larrive
  *
  * This file is subject to the terms and conditions of the GNU Lesser General
  * Public License v2.1. See the file LICENSE in the top level directory for more
@@ -14,6 +15,7 @@
  * @name        Peripheral MCU configuration for the FRDM-K22F
  *
  * @author      Joakim Nohlgård <joakim.nohlgard@eistec.se>
+ * @author      Hugues Larrive <hugues.larrive@pm.me>
  */
 
 #ifndef PERIPH_CONF_H
@@ -141,22 +143,54 @@ static const uart_conf_t uart_config[] = {
  */
 static const adc_conf_t adc_config[] = {
     /* dev, pin, channel */
-    [ 0] = { .dev = ADC0, .pin = GPIO_UNDEF          , .chan =  0, .avg = ADC_AVG_MAX }, /* ADC0_DP0 */
-    [ 1] = { .dev = ADC0, .pin = GPIO_UNDEF          , .chan = 19, .avg = ADC_AVG_MAX }, /* ADC0_DM0 */
-    [ 2] = { .dev = ADC1, .pin = GPIO_UNDEF          , .chan =  0, .avg = ADC_AVG_MAX }, /* ADC1_DP0 */
-    [ 3] = { .dev = ADC1, .pin = GPIO_UNDEF          , .chan = 19, .avg = ADC_AVG_MAX }, /* ADC1_DM0 */
-    [ 4] = { .dev = ADC0, .pin = GPIO_PIN(PORT_B,  0), .chan =  8, .avg = ADC_AVG_MAX }, /* PTB0 (Arduino A0) */
-    [ 5] = { .dev = ADC0, .pin = GPIO_PIN(PORT_B,  1), .chan =  9, .avg = ADC_AVG_MAX }, /* PTB1 (Arduino A1) */
-    [ 6] = { .dev = ADC0, .pin = GPIO_PIN(PORT_C,  1), .chan = 15, .avg = ADC_AVG_MAX }, /* PTC1 (Arduino A2) */
-    [ 7] = { .dev = ADC0, .pin = GPIO_PIN(PORT_C,  2), .chan =  4, .avg = ADC_AVG_MAX }, /* PTC2 (Arduino A3) */
+    [0] = { /* ADC0_DP0 */
+        .dev = ADC0,    .pin = GPIO_UNDEF,
+        .chan = 0,      .avg = ADC_AVG_MAX
+    },
+    [1] = { /* ADC0_DM0 */
+        .dev = ADC0,    .pin = GPIO_UNDEF,
+        .chan = 19,     .avg = ADC_AVG_MAX
+    },
+    [2] = { /* ADC1_DP0 */
+        .dev = ADC1,    .pin = GPIO_UNDEF,
+        .chan = 0,      .avg = ADC_AVG_MAX
+    },
+    [3] = { /* ADC1_DM0 */
+        .dev = ADC1,    .pin = GPIO_UNDEF,
+        .chan = 19,     .avg = ADC_AVG_MAX
+    },
+    [4] = { /* PTB0 (Arduino A0) */
+        .dev = ADC0,    .pin = GPIO_PIN(PORT_B, 0),
+        .chan = 8,      .avg = ADC_AVG_MAX
+    },
+    [5] = { /* PTB1 (Arduino A1) */
+        .dev = ADC0,    .pin = GPIO_PIN(PORT_B, 1),
+        .chan = 9,     .avg = ADC_AVG_MAX
+    },
+    [6] = { /* PTC1 (Arduino A2) */
+        .dev = ADC0,    .pin = GPIO_PIN(PORT_C, 1),
+        .chan = 15,     .avg = ADC_AVG_MAX
+    },
+    [7] = { /* PTC2 (Arduino A3) */
+        .dev = ADC0,    .pin = GPIO_PIN(PORT_C, 2),
+        .chan = 4,      .avg = ADC_AVG_MAX
+    },
     /* internal: temperature sensor */
-    /* The temperature sensor has a very high output impedance, it must not be
-     * sampled using hardware averaging, or the sampled values will be garbage */
-    [ 8] = { .dev = ADC0, .pin = GPIO_UNDEF, .chan = 26, .avg = ADC_AVG_NONE },
+    /* The temperature sensor has a very high output impedance, it must
+     * not be sampled using hardware averaging, or the sampled values
+     * will be garbage */
+    [8] = {
+        .dev = ADC0,    .pin = GPIO_UNDEF,
+        .chan = 26,     .avg = ADC_AVG_NONE
+    },
     /* internal: band gap */
-    /* Note: the band gap buffer uses a bit of current and is turned off by default,
-     * Set PMC->REGSC |= PMC_REGSC_BGBE_MASK before reading or the input will be floating */
-    [ 9] = { .dev = ADC0, .pin = GPIO_UNDEF, .chan = 27, .avg = ADC_AVG_MAX },
+    /* Note: the band gap buffer uses a bit of current and is turned off
+     * by default, set PMC->REGSC |= PMC_REGSC_BGBE_MASK before reading
+     * or the input will be floating */
+    [9] = {
+        .dev = ADC0,    .pin = GPIO_UNDEF,
+        .chan = 27,     .avg = ADC_AVG_MAX
+    },
 };
 
 #define ADC_NUMOF           ARRAY_SIZE(adc_config)
@@ -191,47 +225,8 @@ static const pwm_conf_t pwm_config[] = {
 
 /**
  * @name   SPI configuration
- *
- * Clock configuration values based on the configured 48Mhz module clock.
- *
- * Auto-generated by:
- * cpu/kinetis/dist/calc_spi_scalers/calc_spi_scalers.c
- *
-* @{
-*/
-static const uint32_t spi_clk_config[] = {
-    (
-        SPI_CTAR_PBR(0) | SPI_CTAR_BR(8) |          /* -> 93750Hz */
-        SPI_CTAR_PCSSCK(0) | SPI_CTAR_CSSCK(8) |
-        SPI_CTAR_PASC(0) | SPI_CTAR_ASC(8) |
-        SPI_CTAR_PDT(0) | SPI_CTAR_DT(8)
-    ),
-    (
-        SPI_CTAR_PBR(0) | SPI_CTAR_BR(6) |          /* -> 375000Hz */
-        SPI_CTAR_PCSSCK(0) | SPI_CTAR_CSSCK(6) |
-        SPI_CTAR_PASC(0) | SPI_CTAR_ASC(6) |
-        SPI_CTAR_PDT(0) | SPI_CTAR_DT(6)
-    ),
-    (
-        SPI_CTAR_PBR(1) | SPI_CTAR_BR(4) |          /* -> 1000000Hz */
-        SPI_CTAR_PCSSCK(1) | SPI_CTAR_CSSCK(3) |
-        SPI_CTAR_PASC(1) | SPI_CTAR_ASC(3) |
-        SPI_CTAR_PDT(1) | SPI_CTAR_DT(3)
-    ),
-    (
-        SPI_CTAR_PBR(2) | SPI_CTAR_BR(0) |          /* -> 4800000Hz */
-        SPI_CTAR_PCSSCK(2) | SPI_CTAR_CSSCK(0) |
-        SPI_CTAR_PASC(2) | SPI_CTAR_ASC(0) |
-        SPI_CTAR_PDT(2) | SPI_CTAR_DT(0)
-    ),
-    (
-        SPI_CTAR_PBR(1) | SPI_CTAR_BR(0) |          /* -> 8000000Hz */
-        SPI_CTAR_PCSSCK(1) | SPI_CTAR_CSSCK(0) |
-        SPI_CTAR_PASC(1) | SPI_CTAR_ASC(0) |
-        SPI_CTAR_PDT(1) | SPI_CTAR_DT(0)
-    )
-};
-
+ * @{
+ */
 static const spi_conf_t spi_config[] = {
     {
         .dev      = SPI0,

diff --git a/boards/frdm-k64f/include/periph_conf.h b/boards/frdm-k64f/include/periph_conf.h
@@ -188,47 +188,8 @@ static const pwm_conf_t pwm_config[] = {
 
 /**
  * @name   SPI configuration
- *
- * Clock configuration values based on the configured 30Mhz module clock.
- *
- * Auto-generated by:
- * cpu/kinetis/dist/calc_spi_scalers/calc_spi_scalers.c
- *
-* @{
-*/
-static const uint32_t spi_clk_config[] = {
-    (
-        SPI_CTAR_PBR(2) | SPI_CTAR_BR(6) |          /* -> 93750Hz */
-        SPI_CTAR_PCSSCK(2) | SPI_CTAR_CSSCK(5) |
-        SPI_CTAR_PASC(2) | SPI_CTAR_ASC(5) |
-        SPI_CTAR_PDT(2) | SPI_CTAR_DT(5)
-    ),
-    (
-        SPI_CTAR_PBR(2) | SPI_CTAR_BR(4) |          /* -> 375000Hz */
-        SPI_CTAR_PCSSCK(2) | SPI_CTAR_CSSCK(3) |
-        SPI_CTAR_PASC(2) | SPI_CTAR_ASC(3) |
-        SPI_CTAR_PDT(2) | SPI_CTAR_DT(3)
-    ),
-    (
-        SPI_CTAR_PBR(2) | SPI_CTAR_BR(2) |          /* -> 1000000Hz */
-        SPI_CTAR_PCSSCK(0) | SPI_CTAR_CSSCK(4) |
-        SPI_CTAR_PASC(0) | SPI_CTAR_ASC(4) |
-        SPI_CTAR_PDT(0) | SPI_CTAR_DT(4)
-    ),
-    (
-        SPI_CTAR_PBR(1) | SPI_CTAR_BR(0) |          /* -> 5000000Hz */
-        SPI_CTAR_PCSSCK(1) | SPI_CTAR_CSSCK(0) |
-        SPI_CTAR_PASC(1) | SPI_CTAR_ASC(0) |
-        SPI_CTAR_PDT(1) | SPI_CTAR_DT(0)
-    ),
-    (
-        SPI_CTAR_PBR(0) | SPI_CTAR_BR(0) |          /* -> 7500000Hz */
-        SPI_CTAR_PCSSCK(0) | SPI_CTAR_CSSCK(1) |
-        SPI_CTAR_PASC(0) | SPI_CTAR_ASC(1) |
-        SPI_CTAR_PDT(0) | SPI_CTAR_DT(1)
-    )
-};
-
+ * @{
+ */
 static const spi_conf_t spi_config[] = {
     {
         .dev      = SPI0,

diff --git a/boards/mulle/include/periph_conf.h b/boards/mulle/include/periph_conf.h
@@ -260,47 +260,8 @@ static const pwm_conf_t pwm_config[] = {
 
 /**
  * @name SPI configuration
- *
- * Clock configuration values based on the configured 47988736Hz module clock.
- *
- * Auto-generated by:
- * cpu/kinetis/dist/calc_spi_scalers/calc_spi_scalers.c
- *
  * @{
  */
-static const uint32_t spi_clk_config[] = {
-    (
-        SPI_CTAR_PBR(0) | SPI_CTAR_BR(8) |          /* -> 93728Hz */
-        SPI_CTAR_PCSSCK(0) | SPI_CTAR_CSSCK(8) |
-        SPI_CTAR_PASC(0) | SPI_CTAR_ASC(8) |
-        SPI_CTAR_PDT(0) | SPI_CTAR_DT(8)
-    ),
-    (
-        SPI_CTAR_PBR(0) | SPI_CTAR_BR(6) |          /* -> 374912Hz */
-        SPI_CTAR_PCSSCK(0) | SPI_CTAR_CSSCK(6) |
-        SPI_CTAR_PASC(0) | SPI_CTAR_ASC(6) |
-        SPI_CTAR_PDT(0) | SPI_CTAR_DT(6)
-    ),
-    (
-        SPI_CTAR_PBR(1) | SPI_CTAR_BR(4) |          /* -> 999765Hz */
-        SPI_CTAR_PCSSCK(1) | SPI_CTAR_CSSCK(3) |
-        SPI_CTAR_PASC(1) | SPI_CTAR_ASC(3) |
-        SPI_CTAR_PDT(1) | SPI_CTAR_DT(3)
-    ),
-    (
-        SPI_CTAR_PBR(2) | SPI_CTAR_BR(0) |          /* -> 4798873Hz */
-        SPI_CTAR_PCSSCK(2) | SPI_CTAR_CSSCK(0) |
-        SPI_CTAR_PASC(2) | SPI_CTAR_ASC(0) |
-        SPI_CTAR_PDT(2) | SPI_CTAR_DT(0)
-    ),
-    (
-        SPI_CTAR_PBR(1) | SPI_CTAR_BR(0) |          /* -> 7998122Hz */
-        SPI_CTAR_PCSSCK(1) | SPI_CTAR_CSSCK(0) |
-        SPI_CTAR_PASC(1) | SPI_CTAR_ASC(0) |
-        SPI_CTAR_PDT(1) | SPI_CTAR_DT(0)
-    )
-};
-
 static const spi_conf_t spi_config[] = {
     {
         .dev      = SPI0,

diff --git a/boards/openlabs-kw41z-mini/include/periph_conf.h b/boards/openlabs-kw41z-mini/include/periph_conf.h
@@ -267,47 +267,8 @@ static const pwm_conf_t pwm_config[] = {
 
 /**
  * @name   SPI configuration
- *
- * Clock configuration values based on the configured 16Mhz module clock.
- *
- * Auto-generated by:
- * cpu/kinetis/dist/calc_spi_scalers/calc_spi_scalers.c
- *
  * @{
  */
-static const uint32_t spi_clk_config[] = {
-    (
-        SPI_CTAR_PBR(2) | SPI_CTAR_BR(5) |          /* -> 100000Hz */
-        SPI_CTAR_PCSSCK(2) | SPI_CTAR_CSSCK(4) |
-        SPI_CTAR_PASC(2) | SPI_CTAR_ASC(4) |
-        SPI_CTAR_PDT(2) | SPI_CTAR_DT(4)
-    ),
-    (
-        SPI_CTAR_PBR(2) | SPI_CTAR_BR(3) |          /* -> 400000Hz */
-        SPI_CTAR_PCSSCK(2) | SPI_CTAR_CSSCK(2) |
-        SPI_CTAR_PASC(2) | SPI_CTAR_ASC(2) |
-        SPI_CTAR_PDT(2) | SPI_CTAR_DT(2)
-    ),
-    (
-        SPI_CTAR_PBR(0) | SPI_CTAR_BR(3) |          /* -> 1000000Hz */
-        SPI_CTAR_PCSSCK(0) | SPI_CTAR_CSSCK(3) |
-        SPI_CTAR_PASC(0) | SPI_CTAR_ASC(3) |
-        SPI_CTAR_PDT(0) | SPI_CTAR_DT(3)
-    ),
-    (
-        SPI_CTAR_PBR(0) | SPI_CTAR_BR(0) |          /* -> 4000000Hz */
-        SPI_CTAR_PCSSCK(0) | SPI_CTAR_CSSCK(1) |
-        SPI_CTAR_PASC(0) | SPI_CTAR_ASC(1) |
-        SPI_CTAR_PDT(0) | SPI_CTAR_DT(1)
-    ),
-    (
-        SPI_CTAR_PBR(0) | SPI_CTAR_BR(0) |          /* -> 4000000Hz */
-        SPI_CTAR_PCSSCK(0) | SPI_CTAR_CSSCK(0) |
-        SPI_CTAR_PASC(0) | SPI_CTAR_ASC(0) |
-        SPI_CTAR_PDT(0) | SPI_CTAR_DT(0)
-    )
-};
-
 static const spi_conf_t spi_config[] = {
     {
         .dev      = SPI0,

diff --git a/boards/pba-d-01-kw2x/include/periph_conf.h b/boards/pba-d-01-kw2x/include/periph_conf.h
@@ -174,47 +174,8 @@ static const pwm_conf_t pwm_config[] = {
 
 /**
  * @name    SPI device configuration
- *
- * Clock configuration values based on the configured 48Mhz module clock.
- *
- * Auto-generated by:
- * cpu/kinetis/dist/calc_spi_scalers/calc_spi_scalers.c
- *
  * @{
  */
-static const uint32_t spi_clk_config[] = {
-    (
-        SPI_CTAR_PBR(0) | SPI_CTAR_BR(8) |          /* -> 93750Hz */
-        SPI_CTAR_PCSSCK(0) | SPI_CTAR_CSSCK(8) |
-        SPI_CTAR_PASC(0) | SPI_CTAR_ASC(8) |
-        SPI_CTAR_PDT(0) | SPI_CTAR_DT(8)
-    ),
-    (
-        SPI_CTAR_PBR(0) | SPI_CTAR_BR(6) |          /* -> 375000Hz */
-        SPI_CTAR_PCSSCK(0) | SPI_CTAR_CSSCK(6) |
-        SPI_CTAR_PASC(0) | SPI_CTAR_ASC(6) |
-        SPI_CTAR_PDT(0) | SPI_CTAR_DT(6)
-    ),
-    (
-        SPI_CTAR_PBR(1) | SPI_CTAR_BR(4) |          /* -> 1000000Hz */
-        SPI_CTAR_PCSSCK(1) | SPI_CTAR_CSSCK(3) |
-        SPI_CTAR_PASC(1) | SPI_CTAR_ASC(3) |
-        SPI_CTAR_PDT(1) | SPI_CTAR_DT(3)
-    ),
-    (
-        SPI_CTAR_PBR(2) | SPI_CTAR_BR(0) |          /* -> 4800000Hz */
-        SPI_CTAR_PCSSCK(2) | SPI_CTAR_CSSCK(0) |
-        SPI_CTAR_PASC(2) | SPI_CTAR_ASC(0) |
-        SPI_CTAR_PDT(2) | SPI_CTAR_DT(0)
-    ),
-    (
-        SPI_CTAR_PBR(1) | SPI_CTAR_BR(0) |          /* -> 8000000Hz */
-        SPI_CTAR_PCSSCK(1) | SPI_CTAR_CSSCK(0) |
-        SPI_CTAR_PASC(1) | SPI_CTAR_ASC(0) |
-        SPI_CTAR_PDT(1) | SPI_CTAR_DT(0)
-    )
-};
-
 static const spi_conf_t spi_config[] = {
     {
         .dev      = SPI0,