cpu/nrf52: add uart flow control on nrf52840

hugueslarrive · Jan 25, 2019 · 336851e · 336851e
1 parent 1be6074
commit 336851e
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Showing 2 changed files with 30 additions and 12 deletions.
diff --git a/cpu/nrf52/include/periph_cpu.h b/cpu/nrf52/include/periph_cpu.h
@@ -43,6 +43,9 @@ extern "C" {
 #define SPI_MOSISEL         (dev(bus)->PSEL.MOSI)
 #define SPI_MISOSEL         (dev(bus)->PSEL.MISO)
 #ifndef CPU_MODEL_NRF52840XXAA
+#define UART_PIN_RTS        GPIO_UNDEF
+#define UART_PIN_CTS        GPIO_UNDEF
+#define UART_HWFLOWCTRL     0
 #define UART_IRQN           (UARTE0_UART0_IRQn)
 #endif
 /** @} */
@@ -165,6 +168,8 @@ typedef struct {
     NRF_UART_Type *dev;     /**< UART device base register address */
     uint8_t rx_pin;         /**< RX pin */
     uint8_t tx_pin;         /**< TX pin */
+    uint8_t rts_pin;        /**< RTS pin - set to GPIO_UNDEF when not using HW flow control */
+    uint8_t cts_pin;        /**< CTS pin - set to GPIO_UNDEF when not using HW flow control */
     uint8_t irqn;           /**< IRQ channel */
 } uart_conf_t;
 #endif

diff --git a/cpu/nrf5x_common/periph/uart.c b/cpu/nrf5x_common/periph/uart.c
@@ -38,12 +38,25 @@
 #define UART_IRQN        uart_config[uart].irqn
 #define UART_PIN_RX      uart_config[uart].rx_pin
 #define UART_PIN_TX      uart_config[uart].tx_pin
+#define UART_PIN_RTS     uart_config[uart].rts_pin
+#define UART_PIN_CTS     uart_config[uart].cts_pin
+#define UART_HWFLOWCTRL  (uart_config[uart].rts_pin != GPIO_UNDEF && \
+                          uart_config[uart].cts_pin != GPIO_UNDEF)
 #else
 #define PSEL_RXD         dev(uart)->PSELRXD
 #define PSEL_TXD         dev(uart)->PSELTXD
 #define PSEL_RTS         dev(uart)->PSELRTS
 #define PSEL_CTS         dev(uart)->PSELCTS
 #define UART_0_ISR       isr_uart0
+#ifndef UART_PIN_RTS
+#define UART_PIN_RTS     GPIO_UNDEF
+#endif
+#ifndef UART_PIN_CTS
+#define UART_PIN_CTS     GPIO_UNDEF
+#endif
+#ifndef UART_HWFLOWCTRL
+#define UART_HWFLOWCTRL  0
+#endif
 #endif
 
 /**
@@ -88,18 +101,18 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
     PSEL_TXD = UART_PIN_TX;
 
     /* enable HW-flow control if defined */
-#if UART_HWFLOWCTRL
-    /* set pin mode for RTS and CTS pins */
-    gpio_init(UART_PIN_RTS, GPIO_OUT);
-    gpio_init(UART_PIN_CTS, GPIO_IN);
-    /* configure RTS and CTS pins to use */
-    PSEL_RTS = UART_PIN_RTS;
-    PSEL_CTS = UART_PIN_CTS;
-    dev(uart)->CONFIG |= UART_CONFIG_HWFC_Msk;  /* enable HW flow control */
-#else
-    PSEL_RTS = 0xffffffff;            /* pin disconnected */
-    PSEL_CTS = 0xffffffff;            /* pin disconnected */
-#endif
+    if (UART_HWFLOWCTRL) {
+        /* set pin mode for RTS and CTS pins */
+        gpio_init(UART_PIN_RTS, GPIO_OUT);
+        gpio_init(UART_PIN_CTS, GPIO_IN);
+        /* configure RTS and CTS pins to use */
+        PSEL_RTS = UART_PIN_RTS;
+        PSEL_CTS = UART_PIN_CTS;
+        dev(uart)->CONFIG |= UART_CONFIG_HWFC_Msk;  /* enable HW flow control */
+    } else {
+        PSEL_RTS = 0xffffffff;            /* pin disconnected */
+        PSEL_CTS = 0xffffffff;            /* pin disconnected */
+    }
 
     /* select baudrate */
     switch (baudrate) {