PCIe 4+ interface

[hughperkins]

Need a PCIe 4+ interface, for communications between the main computer's CPUs, and the GPU board.

The PCIe interface will be used to copy data to and from the mainboard memory; to receive kernel launch requests from a mainboard CPU core; and to inform the mainboard CPU core once the kernel has finished running.

What we need for VeriGPU:

• comprehensive verification of the PCIe interface
  • ideally including formal verification
• need clear documentation on how to integrate the PCIe interface with VeriGPU
  • how to use the interface to copy data to and from mainboard main memory?
  • how to receive data/instructions from a mainboard CPU?
  • how to send data/responses to a mainboard CPU?
• ideally need a PR to integrate the PCIe 4+ interface with VeriGPU

Introduction to PCIe https://pcisig.com/sites/default/files/files/PCI_Express_Basics_Background.pdf

(from linked presentation)

Bear in mind that taping out at 5nm costs $250M or so, so we want things to work first time. Therefore verification is important :)

[mithro]

You might want to investigate;

• https://github.com/enjoy-digital/litepcie
• https://github.com/whitequark/Yumewatari
• https://github.com/ecp5-pcie

And a bit more peripherally related (USB3);

• https://github.com/enjoy-digital/daisho
• https://github.com/enjoy-digital/usb3_pipe
• https://github.com/greatscottgadgets/luna/tree/main/luna/gateware/usb/usb3
• https://github.com/greatscottgadgets/bucatini