Don't set a default value for clk rate

hdl-util · Apr 26, 2020 · 624cb32 · 624cb32
1 parent 3c8ec50
commit 624cb32
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Showing 3 changed files with 3 additions and 3 deletions.
diff --git a/src/imx219.sv b/src/imx219.sv
@@ -1,5 +1,5 @@
 module imx219 #(
-    parameter INPUT_CLK_RATE = 48000000,
+    parameter INPUT_CLK_RATE,
     parameter TARGET_SCL_RATE = 400000,
     // Some IMX219 modules have a different address, change this if yours does
     parameter ADDRESS = 8'h20

diff --git a/src/ov5647.sv b/src/ov5647.sv
@@ -1,5 +1,5 @@
 module ov5647 #(
-    parameter INPUT_CLK_RATE = 48000000,
+    parameter INPUT_CLK_RATE,
     parameter TARGET_SCL_RATE = 400000,
     // Some ov5647 modules have a different address, change this if yours does
     parameter ADDRESS = 8'h6c

diff --git a/test/imx219_tb.sv b/test/imx219_tb.sv
@@ -25,7 +25,7 @@ logic power_enable;
 logic model_err;
 logic nack_err;
 
-imx219 imx219 (
+imx219 #(.INPUT_CLK_RATE(48000000)) imx219 (
     .clk_in(clk_in),
     .scl(scl),
     .sda(sda),