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Add initial support for Wandboard dual lite and solo.
Wandboard is a development board that has two variants: one version based on mx6 dual lite and another one based on mx6 solo. For more details about Wandboard, please refer to: http://www.wandboard.org/ Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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# | ||
# (C) Copyright 2013 Freescale Semiconductor, Inc. | ||
# | ||
# This program is free software; you can redistribute it and/or | ||
# modify it under the terms of the GNU General Public License as | ||
# published by the Free Software Foundation; either version 2 of | ||
# the License, or (at your option) any later version. | ||
# | ||
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include $(TOPDIR)/config.mk | ||
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LIB = $(obj)lib$(BOARD).o | ||
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COBJS := wandboard.o | ||
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SRCS := $(COBJS:.o=.c) | ||
OBJS := $(addprefix $(obj),$(COBJS)) | ||
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$(LIB): $(obj).depend $(OBJS) | ||
$(call cmd_link_o_target, $(OBJS)) | ||
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######################################################################### | ||
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# defines $(obj).depend target | ||
include $(SRCTREE)/rules.mk | ||
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sinclude $(obj).depend | ||
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######################################################################### |
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U-Boot for Wandboard | ||
-------------------- | ||
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This file contains information for the port of U-Boot to the Wandboard. | ||
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Wandboard is a development board that has two variants: one version based | ||
on mx6 dual lite and another one based on mx6 solo. | ||
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For more details about Wandboard, please refer to: | ||
http://www.wandboard.org/ | ||
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Building U-boot for Wandboard | ||
----------------------------- | ||
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To build U-Boot for the Wandboard Dual Lite version: | ||
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$ make wanboard_dl_config | ||
$ make | ||
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To build U-Boot for the Wandboard Solo version: | ||
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$ make wanboard_solo_config | ||
$ make | ||
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Flashing U-boot into the SD card | ||
-------------------------------- | ||
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- After the 'make' command completes, the generated 'u-boot.imx' binary must be | ||
flashed into the SD card; | ||
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$ sudo dd if=u-boot.imx of=/dev/mmcblk0 bs=512 seek=2; sync | ||
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(Note - the SD card node may vary, so adjust this as needed). | ||
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- Insert the SD card into the slot located in the bottom of the board (same side | ||
as the mx6 processor) | ||
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- Connect the serial cable to the host PC | ||
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- Power up the board and U-boot messages will appear in the serial console. |
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/* | ||
* Copyright (C) 2013 Freescale Semiconductor, Inc. | ||
* | ||
* Author: Fabio Estevam <fabio.estevam@freescale.com> | ||
* | ||
* This program is free software; you can redistribute it and/or | ||
* modify it under the terms of the GNU General Public License as | ||
* published by the Free Software Foundation; either version 2 of | ||
* the License, or (at your option) any later version. | ||
*/ | ||
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#include <asm/arch/clock.h> | ||
#include <asm/arch/iomux.h> | ||
#include <asm/arch/imx-regs.h> | ||
#include <asm/arch/mx6-pins.h> | ||
#include <asm/arch/sys_proto.h> | ||
#include <asm/gpio.h> | ||
#include <asm/imx-common/iomux-v3.h> | ||
#include <asm/io.h> | ||
#include <asm/sizes.h> | ||
#include <common.h> | ||
#include <fsl_esdhc.h> | ||
#include <mmc.h> | ||
#include <miiphy.h> | ||
#include <netdev.h> | ||
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DECLARE_GLOBAL_DATA_PTR; | ||
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#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ | ||
PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ | ||
PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) | ||
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#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ | ||
PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \ | ||
PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) | ||
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#define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ | ||
PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ | ||
PAD_CTL_DSE_40ohm | PAD_CTL_HYS) | ||
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#define ETH_PHY_RESET IMX_GPIO_NR(3, 29) | ||
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int dram_init(void) | ||
{ | ||
gd->ram_size = CONFIG_DDR_MB * SZ_1M; | ||
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return 0; | ||
} | ||
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static iomux_v3_cfg_t const uart1_pads[] = { | ||
MX6_PAD_CSI0_DAT10__UART1_TXD | MUX_PAD_CTRL(UART_PAD_CTRL), | ||
MX6_PAD_CSI0_DAT11__UART1_RXD | MUX_PAD_CTRL(UART_PAD_CTRL), | ||
}; | ||
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static iomux_v3_cfg_t const usdhc3_pads[] = { | ||
MX6_PAD_SD3_CLK__USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), | ||
MX6_PAD_SD3_CMD__USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), | ||
MX6_PAD_SD3_DAT0__USDHC3_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), | ||
MX6_PAD_SD3_DAT1__USDHC3_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), | ||
MX6_PAD_SD3_DAT2__USDHC3_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), | ||
MX6_PAD_SD3_DAT3__USDHC3_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), | ||
}; | ||
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static iomux_v3_cfg_t const enet_pads[] = { | ||
MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), | ||
MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), | ||
MX6_PAD_RGMII_TXC__ENET_RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL), | ||
MX6_PAD_RGMII_TD0__ENET_RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), | ||
MX6_PAD_RGMII_TD1__ENET_RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), | ||
MX6_PAD_RGMII_TD2__ENET_RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), | ||
MX6_PAD_RGMII_TD3__ENET_RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), | ||
MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), | ||
MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL), | ||
MX6_PAD_RGMII_RXC__ENET_RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL), | ||
MX6_PAD_RGMII_RD0__ENET_RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), | ||
MX6_PAD_RGMII_RD1__ENET_RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), | ||
MX6_PAD_RGMII_RD2__ENET_RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), | ||
MX6_PAD_RGMII_RD3__ENET_RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), | ||
MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), | ||
/* AR8031 PHY Reset */ | ||
MX6_PAD_EIM_D29__GPIO_3_29 | MUX_PAD_CTRL(NO_PAD_CTRL), | ||
}; | ||
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static void setup_iomux_uart(void) | ||
{ | ||
imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); | ||
} | ||
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static void setup_iomux_enet(void) | ||
{ | ||
imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads)); | ||
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/* Reset AR8031 PHY */ | ||
gpio_direction_output(ETH_PHY_RESET, 0); | ||
udelay(500); | ||
gpio_set_value(ETH_PHY_RESET, 1); | ||
} | ||
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static struct fsl_esdhc_cfg usdhc_cfg[1] = { | ||
{USDHC3_BASE_ADDR}, | ||
}; | ||
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int board_mmc_init(bd_t *bis) | ||
{ | ||
imx_iomux_v3_setup_multiple_pads(usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); | ||
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usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); | ||
return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); | ||
} | ||
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static int mx6_rgmii_rework(struct phy_device *phydev) | ||
{ | ||
unsigned short val; | ||
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/* To enable AR8031 ouput a 125MHz clk from CLK_25M */ | ||
phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7); | ||
phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016); | ||
phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007); | ||
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val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe); | ||
val &= 0xffe3; | ||
val |= 0x18; | ||
phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val); | ||
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/* introduce tx clock delay */ | ||
phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5); | ||
val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e); | ||
val |= 0x0100; | ||
phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val); | ||
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return 0; | ||
} | ||
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int board_phy_config(struct phy_device *phydev) | ||
{ | ||
mx6_rgmii_rework(phydev); | ||
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if (phydev->drv->config) | ||
phydev->drv->config(phydev); | ||
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return 0; | ||
} | ||
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int board_eth_init(bd_t *bis) | ||
{ | ||
int ret; | ||
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setup_iomux_enet(); | ||
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ret = cpu_eth_init(bis); | ||
if (ret) | ||
printf("FEC MXC: %s:failed\n", __func__); | ||
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return 0; | ||
} | ||
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int board_early_init_f(void) | ||
{ | ||
setup_iomux_uart(); | ||
return 0; | ||
} | ||
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int board_init(void) | ||
{ | ||
/* address of boot parameters */ | ||
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; | ||
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return 0; | ||
} | ||
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u32 get_board_rev(void) | ||
{ | ||
return get_cpu_rev(); | ||
} | ||
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int checkboard(void) | ||
{ | ||
puts("Board: Wandboard\n"); | ||
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return 0; | ||
} |
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