mpc5200: Add a4m2k board port

This patch adds the a4m2k MPC5200B board port. Its a derivate of
the a3m071 board with only minor changes.

Additionally this patch includes some clean-up changes:
- Remove I2C support from a3m071 as its unused
- Fix/enhance default env variables
- Fix some comments
- Add newly introduced CONFIG_SPL_TARGET to automatically build
  "u-boot-img.bin"
- Fix dtb patching in READ desciption for SPL Linux booting:
  "fdt chosen" needs to get called to patch/create the chosen node.
- Add missing call to spl_board_init():
  Define CONFIG_SPL_BOARD_INIT so that spl_board_init() will get
  called in the SPL version.

Signed-off-by: Stefan Roese <sr@denx.de>

MAINTAINERS

@@ -397,6 +397,7 @@ Ricardo Ribalda <ricardo.ribalda@uam.es>
 Stefan Roese <sr@denx.de>
 
 	a3m071		MPC5200
+	a4m2k		MPC5200
 
 	P3M7448		MPC7448
 

board/a3m071/README

@@ -62,7 +62,7 @@ the following command:
 
 All this can be integrated into an environment command:
 => setenv upd_fdt 'tftp 1800000 a3m071/a3m071.dtb;run mtdargs addip2 addtty; \
-	fdt addr 1800000;fdt boardsetup;erase fc060000 fc07ffff; \
+	fdt addr 1800000;fdt boardsetup;fdt chosen;erase fc060000 fc07ffff; \
 	cp.b 1800000 fc060000 10000'
 => saveenv
 

board/a3m071/a3m071.c

@@ -24,10 +24,15 @@
 #include <mpc5xxx.h>
 #include <pci.h>
 #include <miiphy.h>
+#include <linux/compiler.h>
 #include <asm/processor.h>
 #include <asm/io.h>
 
+#ifdef CONFIG_A4M2K
+#include "is46r16320d.h"
+#else
 #include "mt46v16m16-75.h"
+#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -63,6 +68,12 @@ static void sdram_start(int hi_addr)
 
 	/* normal operation */
 	out_be32((void *)MPC5XXX_SDRAM_CTRL, control);
+
+	/*
+	 * Wait a short while for the DLL to lock before accessing
+	 * the SDRAM
+	 */
+	udelay(100);
 }
 #endif
 
@@ -157,19 +168,24 @@ static void get_revisions(int *failsavelevel, int *digiboardversion,
 	struct mpc5xxx_gpt_0_7 *gpt = (struct mpc5xxx_gpt_0_7 *)MPC5XXX_GPT;
 	u8 val;
 
-	/*
-	 * Figure out failsavelevel
-	 * see ticket dsvk#59
-	 */
-	*failsavelevel = 0;	/* 0=failsave, 1=board ok, 2=fpga ok */
-
 	/* read digitalboard-version from TMR[2..4] */
 	val = 0;
 	val |= (gpt->gpt2.sr & (1 << (31 - 23))) ? (1) : 0;
 	val |= (gpt->gpt3.sr & (1 << (31 - 23))) ? (1 << 1) : 0;
 	val |= (gpt->gpt4.sr & (1 << (31 - 23))) ? (1 << 2) : 0;
 	*digiboardversion = val;
 
+	/*
+	 * A4M2K only supports digiboardversion. No failsavelevel and
+	 * fpgaversion here.
+	 */
+#if !defined(CONFIG_A4M2K)
+	/*
+	 * Figure out failsavelevel
+	 * see ticket dsvk#59
+	 */
+	*failsavelevel = 0;	/* 0=failsave, 1=board ok, 2=fpga ok */
+
 	if (*digiboardversion == 0) {
 		*failsavelevel = 1;	/* digiboard-version ok */
 
@@ -183,6 +199,7 @@ static void get_revisions(int *failsavelevel, int *digiboardversion,
 		if (*fpgaversion == 1)
 			*failsavelevel = 2;	/* fpga-version ok */
 	}
+#endif
 }
 
 /*
@@ -196,6 +213,11 @@ void spl_board_init(void)
 	struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
 	struct mpc5xxx_mmap_ctl *mm =
 		(struct mpc5xxx_mmap_ctl *)CONFIG_SYS_MBAR;
+
+#if defined(CONFIG_A4M2K)
+	/* enable CS3 and CS5 (FPGA) */
+	setbits_be32(&mm->ipbi_ws_ctrl, (1 << 19) | (1 << 21));
+#else
 	int digiboardversion;
 	int failsavelevel;
 	int fpgaversion;
@@ -219,6 +241,7 @@ void spl_board_init(void)
 
 	/* And write new value back to register */
 	out_be32(&mm->ipbi_ws_ctrl, val);
+#endif
 
 	/*
 	 * No need to change the pin multiplexing (MPC5XXX_GPS_PORT_CONFIG)
@@ -234,6 +257,55 @@ void spl_board_init(void)
 	 */
 	setbits_be32((void *)MPC5XXX_WU_GPIO_ENABLE, 1 << (31 - 0));
 
+#if defined(CONFIG_A4M2K)
+	/* Setup USB[x] as MPCDiag[0..3] GPIO outputs */
+
+	/* set USB0,6,7,8 (MPCDiag[0..3]) direction to output */
+	gpio->simple_ddr |= 1 << (31 - 15);
+	gpio->simple_ddr |= 1 << (31 - 14);
+	gpio->simple_ddr |= 1 << (31 - 13);
+	gpio->simple_ddr |= 1 << (31 - 12);
+
+	/* enable USB0,6,7,8 (MPCDiag[0..3]) as GPIO */
+	gpio->simple_gpioe |= 1 << (31 - 15);
+	gpio->simple_gpioe |= 1 << (31 - 14);
+	gpio->simple_gpioe |= 1 << (31 - 13);
+	gpio->simple_gpioe |= 1 << (31 - 12);
+
+	/* Setup PSC2[0..2] as STSLED[0..2] GPIO outputs */
+
+	/* set PSC2[0..2] (STSLED[0..2]) direction to output */
+	gpio->simple_ddr |= 1 << (31 - 27);
+	gpio->simple_ddr |= 1 << (31 - 26);
+	gpio->simple_ddr |= 1 << (31 - 25);
+
+	/* enable PSC2[0..2] (STSLED[0..2]) as GPIO */
+	gpio->simple_gpioe |= 1 << (31 - 27);
+	gpio->simple_gpioe |= 1 << (31 - 26);
+	gpio->simple_gpioe |= 1 << (31 - 25);
+
+	/* Setup PSC6[2] as MRST2 self reset GPIO output */
+
+	/* set PSC6[2]/IRDA_TX (MRST2) direction to output */
+	gpio->simple_ddr |= 1 << (31 - 3);
+
+	/* set PSC6[2]/IRDA_TX (MRST2) output as open drain */
+	gpio->simple_ode |= 1 << (31 - 3);
+
+	/* set PSC6[2]/IRDA_TX (MRST2) output as default high */
+	gpio->simple_dvo |= 1 << (31 - 3);
+
+	/* enable PSC6[2]/IRDA_TX (MRST2) as GPIO */
+	gpio->simple_gpioe |= 1 << (31 - 3);
+
+	/* Setup PSC6[3] as HARNSSCD harness code GPIO input */
+
+	/* set PSC6[3]/IR_USB_CLK (HARNSSCD) direction to input */
+	gpio->simple_ddr |= 0 << (31 - 2);
+
+	/* enable PSC6[3]/IR_USB_CLK (HARNSSCD) as GPIO */
+	gpio->simple_gpioe |= 1 << (31 - 2);
+#else
 	/* setup GPIOs for status-leds if needed - see ticket #57 */
 	if (failsavelevel > 0) {
 		/* digiboard-version is OK */
@@ -267,7 +339,7 @@ void spl_board_init(void)
 		 * already cleared (intr_ctrl) MBAR+0x0510 ECLR[0] bit above
 		 */
 	}
-
+#endif
 }
 
 int checkboard(void)
@@ -278,11 +350,16 @@ int checkboard(void)
 
 	get_revisions(&failsavelevel, &digiboardversion, &fpgaversion);
 
+#ifdef CONFIG_A4M2K
+	puts("Board: A4M2K\n");
+	printf("       digiboard IO version %u\n", digiboardversion);
+#else
 	puts("Board: A3M071\n");
 	printf("Rev:   failsave level       %u\n", failsavelevel);
 	printf("       digiboard IO version %u\n", digiboardversion);
 	if (failsavelevel > 0)	/* only if fpga-version red */
 		printf("       fpga IO version      %u\n", fpgaversion);
+#endif
 
 	return 0;
 }

board/a3m071/is46r16320d.h

@@ -0,0 +1,35 @@
+/*
+ * (C) Copyright 2004
+ * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#define SDRAM_DDR		/* is DDR */
+
+#if defined(CONFIG_MPC5200)
+/* Settings for XLB = 132 MHz */
+/* see is46r16320d datasheet and MPC5200UM chap. 8.6.1. */
+
+/* SDRAM Config Standard timing */
+#define SDRAM_MODE	0x008d0000
+#define SDRAM_EMODE	0x40010000
+#define SDRAM_CONTROL	0x70430f00
+#define SDRAM_CONFIG1	0x33622930
+#define SDRAM_CONFIG2	0x46670000
+#define SDRAM_TAPDELAY	0x10000000
+
+#else
+#error CONFIG_MPC5200 not defined
+#endif

boards.cfg

@@ -485,6 +485,7 @@ cmi_mpc5xx                   powerpc     mpc5xx      cmi
 PATI                         powerpc     mpc5xx      pati                mpl
 a3m071                       powerpc     mpc5xxx     a3m071
 a4m072                       powerpc     mpc5xxx     a4m072
+a4m2k                        powerpc     mpc5xxx     a3m071              -              -           a3m071:A4M2K
 BC3450                       powerpc     mpc5xxx     bc3450
 canmb                        powerpc     mpc5xxx
 cm5200                       powerpc     mpc5xxx